CDC204 Replaces 74AC11204
Low-Skew Propagation Delay
Specifications for Clock-Driver Applications
CMOS-Compatible Inputs and Outputs
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin VCC and GND Pin
Configurations Minimize High-Speed
Switching Noise
EPIC E (Enhanced-Performance Implanted
CMOS) 1-mm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline Package (DW))

description
The CDC204 contains six independent inverters. The device performs the Boolean function Y = A. It is designed
specifically for applications requiring low skew between switching outputs.
The CDC204 is characterized for operation from TA = 25°C to 70°C.