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MBM29DL800TA датащи (PDF) - SPANSION

MBM29DL800TA Datasheet PDF - SPANSION
номер детали MBM29DL800TA
скачать  MBM29DL800TA скачать
объем файла   601.93 Kbytes
Page   57 Pages
производитель  SPANSION [SPANSION]
домашняя страница  http://www.spansion.com
Logo SPANSION - SPANSION
подробное описание детали FLASH MEMORY CMOS 8M (1M x 8 / 512K x 16) BIT

MBM29DL800TA Datasheet (PDF)

Go To PDF Page скачать датащи
MBM29DL800TA Datasheet PDF - SPANSION

номер детали MBM29DL800TA
скачать  MBM29DL800TA Click to download

объем файла   601.93 Kbytes
Page   57 Pages
производитель  SPANSION [SPANSION]
домашняя страница  http://www.spansion.com
Logo SPANSION - SPANSION
подробное описание детали FLASH MEMORY CMOS 8M (1M x 8 / 512K x 16) BIT

MBM29DL800TA датащи (HTML) - SPANSION


MBM29DL800TA Информация о продукте

■ GENERAL DESCRIPTION
The MBM29DL800TA/BA are a 8M-bit, 3.0 V-only Flash memory organized as 1M bytes of 8 bits each or 512K words of 16 bits each. The MBM29DL800TA/BA are offered in a 48-pin TSOP(I) and 48-ball FBGA packages. These devices are designed to be programmed in-system with the standard system 3.0 V VCC supply. 12.0 V VPP and 5.0 V VCC are not required for write or erase operations. The devices can also be reprogrammed in standard EPROM programmers.

■ FEATURES
• Single 3.0 V read, program, and erase
    Minimizes system level power requirements
• Simultaneous operations
    Read-while-Erase or Read-while-Program
• Compatible with JEDEC-standard commands
    Uses same software commands as E2PROMs
• Compatible with JEDEC-standard world-wide pinouts (Pin compatible with MBM29LV800TA/BA)
    48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
    48-ball FBGA (Package suffix: PBT)
• Minimum 100,000 program/erase cycles
• High performance
    70 ns maximum access time
• Sector erase architecture
    Two 16K byte, four 8K bytes, two 32K byte, and fourteen 64K bytes.
    Any combination of sectors can be concurrently erased. Also supports full chip erase.
• Boot Code Sector Architecture
    T = Top sector
    B = Bottom sector
• Embedded EraseTM Algorithms
    Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms
    Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
    Hardware method for detection of program or erase cycle completion
• Automatic sleep mode
    When addresses remain stable, automatically switch themselves to low power mode.
• Low VCC write inhibit ≤ 2.5 V
• Erase Suspend/Resume
    Suspends the erase operation to allow a read in another sector within the same device
• Sector protection
    Hardware method disables any combination of sectors from program or erase operations
• Sector Protection Set function by Extended sector protection command
• Fast Programming Function by Extended Command
• Temporary sector unprotection
    Temporary sector unprotection via the RESET pin.




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