FEATURES
• Seven H-bridge circuits employing power MOS FET
• Low-voltage driving
VDD = 2.7 to 3.6 V
VM = 2.7 to 5.5 V
• Output on-state resistance: 1.0 Ω TYP., 1.5 Ω MAX. (sum of top and bottom stage, ch1 to ch4, and ch7)
1.5 Ω TYP., 2.0 Ω MAX. (sum of top and bottom stage, ch5 and ch6)
• PWM output (ch1 to ch6), linear output (ch7)
• Output current

DC current: 0.4 A/ch (when each channel is used independently)
Peak current: 0.7 A/ch (when each channel is used independently)

DC current: 0.5 A/ch (when used independently)
Peak current: 0.7 A/ch (when used independently)
• Input logic frequency: 150 kHz supported
• Under-voltage lockout circuit
Shuts down the internal circuit at VDD = 1.7 V TYP.
• Overheat protection circuit
Operates at 150°C or more and shuts down internal circuitry.
• Mounted on 64-pin FLGA (□6 mm, 0.65 mm pitch)