1. General description
The 74LV244AT is an 8-bit buffer/line driver with 3-state outputs and TTL inputs. The
device features two output enables (1OE and 2OE). A HIGH on nOE causes the
associated outputs to assume a high-impedance OFF-state.
Designed to operate over a VCC range from 4.5 V to 5.5 V, the inputs are TTL compatible,
which allows the device to be used to translate from 3.3 V to 5 V.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall
times.
This device is fully specified for partial Power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
 Direct interface with TTL levels
 Supply voltage range from 4.5 V to 5.5 V
 Typical tpd of 2.8 ns at 5 V
 Typical VOL(p) < 0.8 V at VCC = 5 V, Tamb = 25 C
 Typical VOH(v) > 2.3 V at VCC = 5 V, Tamb = 25 C
 Supports mixed-mode voltage operation on all ports
 IOFF circuitry provides partial Power-down mode operation
 Latch-up performance exceeds 250 mA per JESD 78 Class II
 ESD protection:
 HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3 kV
 MM JESD22-A115-A exceeds 150 V
 CDM JESD22-C101E exceeds 2 kV
 Specified from 40 C to +85 C and from 40 C to +125 C