Features
• Single 1.65 V - 3.6 V Supply (-40°C to +104°C)
• Single 1.7 V - 3.6 V Supply (-40°C to +125°C)
• Serial Peripheral Interface (SPI) Compatible
• Supports SPI Modes 0 and 3
• Supports Dual I/O Operation
• 104 MHz Maximum Operating Frequency
• Clock-to-Output (tV) of 6 ns
• Flexible, Optimized Erase Architecture for Code + Data Storage Applications
• Small (256 Byte) Page Erase
• Uniform 4-kByte Block Erase
• Uniform 32-kByte Block Erase
• Uniform 64-kByte Block Erase
• Full Chip Erase
• Hardware Controlled Locking of Protected Sectors via WP Pin
• 128-Byte Programmable One-Time Programmable (OTP) Security Register
• 64 Bytes factory programmed with a unique identifier
• 64 Bytes user programmable
• Flexible Programming
• Byte/Page Program (1 to 256 Bytes)
• Dual-Input Byte/Page Program (1 to 256 Bytes)
• Sequential Program Mode Capability
• Fast Program and Erase Times
• 1.25 ms Typical Page Program (256 Bytes) Time
• 40 ms Typical 4-kByte Block Erase Time
• 250 ms Typical 32-kByte Block Erase Time
• 500 ms Typical 64-kByte Block Erase Time
• Automatic Checking and Reporting of Erase/Program Failures
• Software Controlled Reset
• JEDEC Standard Manufacturer and Device ID Read Methodology
• Low Power Dissipation
• 200 nA Ultra Deep Power Down current (Typical)
• 4.5 µA Deep Power-Down Current (Typical)
• 25 uA Standby current (Typical)
• 4.5 mA Active Read Current (Typical)
• Endurance:
• 100,000 Program/Erase Cycles (-40°C to +104°C)
• 20,000 Program/Erase Cycles (-40°C to +125°C)
• Data Retention: 20 Years
• Complies with Full Industrial Temperature Range
• Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options
• 8-lead SOIC (150-mil)
• 8-pad Ultra Thin DFN (2 x 3 x 0.6 mm)
• 8-pad Ultra Thin DFN (5 x 6 x 0.6 mm)
• 8-lead TSSOP
• 8-ball WLCSP (3 x 2 x 3 ball matrix)

Description
The AT25DF021A is a serial interface Flash memory device designed for use in a wide variety of high-volume
consumer based applications in which program code is shadowed from Flash memory into embedded or external
RAM for execution. The flexible erase architecture of the AT25DF021A, with its page erase granularity it is ideal
for data storage as well, eliminating the need for additional data storage devices.
The erase block sizes of the AT25DF021A have been optimized to meet the needs of today's code and data
storage applications. By optimizing the size of the erase blocks, the memory space can be used much more
efficiently. Because certain code modules and data storage segments must reside by themselves in their own
erase regions, the wasted and unused memory space that occurs with large sectored and large block erase Flash
memory devices can be greatly reduced. This increased memory space efficiency allows additional code routines
and data storage segments to be added while still maintaining the same overall device density.
The device also contains a specialized OTP (One-Time Programmable) Security Register that can be used for
purposes such as unique device serialization, system-level Electronic Serial Number (ESN) storage, locked key
storage, etc.
Specifically designed for use in many different systems, the AT25DF021A supports read, program, and erase
operations with a wide supply voltage range of 1.65 V to 3.6 V. No separate voltage is required for programming
and erasing.