DESCRIPTION

The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7).

FEATURES

• Wide operating voltage: 1.0 to 5.5 V

• Optimized for low voltage applications: 1.0 to 3.6 V

• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

• Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, Tamb = 25°C

• Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb = 25°C

• Demultiplexing capability

• Multiple input enable for easy expansion

• Ideal for memory chip select decoding

• Active LOW mutually exclusive outputs

• Output capability: standard

• ICC category: MSI