1.2. Features
 Wireless communication function
 Compliant with Bluetooth® Low Energy Ver.5.0 specification.
 Built-in Bluetooth® baseband circuit
 Built-in Bluetooth® RF circuit
 Maximum output power: +8 dBm
 Maximum RX sensitivity: -105.0 dBm (in case of Coded PHY and S = 8)
 RSSI accuracy: ±2 dB (in case of -90 to -10 dBm input)
 HCI commands/Extended HCI commands (implemented in the mask ROM)
 Control API for GATT/SM layer (TCU commands: Toshiba Command Unit) (implemented in the mask ROM)
 Auto-advertising feature
 Output power setting feature
 Microcontroller unit
 Built-in Arm® Cortex®-M0 processor (Maximum operating frequency is 32 MHz.)
 Built-in mask ROM
 Boot loader
 API for the hardware control
 Bluetooth® wireless function API
 Bluetooth® protocol stack
 Built-in retention SRAM (User area is 76 KB out of total 144 KB.)
 Interface, AD converter, and Debug function
 General-purpose I/O (GPIO) (18 pins)
 General-purpose serial interfaces
 UART interface (2 channels. Shared with the GPIO pins.)
 HCI mode: One channel is used as a host interface (9600 bps to 921.6 kbps)
 User-App mode: 600 to 2000 kbps (Maximum baudrate may be 2000 kbps or less and depends on userapplication
program.)
 SPI interface (2 channels. Shared with the GPIO pins.)
 I2C interface (2 channels. Shared with the GPIO pins.)
 TC35681 uses one channel as the interface to the EEPROM for User-App mode.
 PWM interface (4 channels. Shared with the GPIO pins.)
 Pulse generation function
 “Rhythm” function (function to mask a pulse signal)
 AD converter (ADC)
 General-purpose voltage measurement (5 channels. Shared with the GPIO pins.)
 Power supply voltage (VBAT) measurement (1 channel. Connected internally.)
 Interface for Emulator debug control
 SWD (Serial Wire Debug): 2-wire system (1 channel)
 Clock
 Reference clock (32 MHz)
 Built-in crystal oscillator with a frequency adjustment function
 Sleep clock (32.768 kHz)
 Built-in crystal oscillator with a frequency adjustment function
 External clock input is supported.
 Built-in silicon oscillator (SiOSC)
 Sleep clock output function (Shared with the GPIO pins.)
 Power supply
 Power supply circuit
 Support for wide range of the input power voltage
 DC/DC converter and LDO regulator are integrated.
 Built-in Power Management Unit for the low power consumption function.
 Independent power pins for the I/O circuits (VDDIO)
 System function
 2 system configurations are supported.
 Host-controlled system (A host CPU controls this device.)
 Standalone system (The operation of this device is controlled by its own CPU.)
 3 operating modes are supported.
 HCI mode
 Control by HCI and Extended HCI commands
 User application (firmware) programming
 For radio certification tests in different countries and regions
 For Bluetooth® qualification test
 For other RF tests
 Complete mode
 Control of this device by the TCU commands (Control commands in the GATT/SM layer)
 User-App mode
 Download function of a user application program to this device
 Download from an external EEPROM or a host CPU
 Execution of a user application program
 Low power system feature
 3 low power modes (Sleep, Backup, and Deep Sleep)
 Support for Interrupts
 Patch support
 Patch function (maximum 4)
 Auto-patch function
 DMA support
 Built-in 7-channel DMA controller (2 to 6 channels are available for a user.)
 Clock and Timer
 RTC
 RTC function with the accuracy of sleep clock frequency
 Clock and Calendar function: YY/MM/DD hh:mm:ss (24-hour clock) and day of the week
 Alarm function: Alarm setting by hh:mm and either a date or a day, and an interrupt by the alarm generation
 Leap year function (the exceptional procedure for every 100 years is not supported.)
 RTC is working even in the Sleep and Backup modes.
 Timer
 BCTimer
 3-channel hardware timer (One channel is dedicated to the system.)
 16-bit counter which can be loaded automatically every 1 μs at minimum.
 The count of the timer stops in low power mode.
 GTimer
 1-channel hardware timer
 Built-in prescaler to divide the clock (1 to 1024 division). The minimum interval is 38 ns to 39 μs.
 16-bit counter which can be loaded automatically.
 The count of the timer stops in low power mode.
 OS timer (1-second timer and 1-ms timer)
 Timer controlled by the OS
 Watchdog timer (WDT) function
 Security
 True Random Number Generator (TRNG)
 A random number of 256 bits at maximum is generated by DRBG and ESG.
 Compliant with NIST SP800-22 and BSI random number test.
 Hardware encryption engine (AES128, only encryption)
 AEC-Q100 is supported.
 Package
 QFN package [40 pins, 6 mm x 6 mm, 0.5-mm pitch, 1.0-mm thickness, and Solder-wettable pins]