# L5510 Drive Manager and Disk Controller

## Overview
Highly integrated, automated single-chip drive manager and disk drive controller IC for headerless ATA drive applications. Preliminary information - details subject to change.

## Key Features
️· ATA Host Interface: Synchronous DMA (modes 0-4), Fast IDE PIO (modes 0-4), ATA Multiword DMA, ATAPI support, IORDY, automatic command execution, 128-byte FIFO, LBA/CHS modes, read/write cache, IRQ automation, daisy-chaining logic, BIOS compatibility, selectable host drivers.
️· DSP Core: 60 MIPS, 16-bit fixed-point, 16x16 multiplier with 32-bit product, single-cycle multiply-accumulate, 36-bit ALU, bit manipulation unit, 6K on-chip RAM.
️· Buffer Controller: 16-bit data bus, 16 Mbit x 16 SDRAM support (up to 150 MB/s), ADFM, dynamic segment size switching, auto-write cache, servo split address adjustment, disk LBA counter.
️· EDAC Block: Optimized ECC (up to six burst OTF correction), 480-bit Reed-Solomon code, programmable interleaving (3-, 4-, 5-way), CRC support, OTF correction guarantees, ECC seeding.
️· Disk Controller: Enhanced Headerless Architecture (EDSA), up to 450 Mbits/s data rate, flexible sequencer, defect skipping/embedded servo capabilities, 128-byte FIFO, error summary bit, three-index timer, MR/PRML channel support.
️· Servo Block: Automatic sector mark generation, programmable sequencers, flexible gating, programmable output pins, synchronous servo support.
️· Other Features: 208-pin QFP package, power-down modes, 3.3V I/Os (5V tolerant), 2.5V logic core, programmable read channel, dual frequency synthesizers, general-purpose I/O, PWM pins, RS232 interface.

## Technical Specifications
️· Memory: 6K on-chip RAM, 16 Mbit x 16 SDRAM support
️· Data Rates: Up to 450 Mbits/s
️· Interfaces: ATA, SDRAM, RS232, General Purpose I/O, PWM

## Order Codes

️· L5510: TFBGA240 Package
️· AIC-5465-DIE: DIE Package

## Revision History
️· December 2004: First Issue