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STM32L471VG датащи(PDF) 185 Page - STMicroelectronics

номер детали STM32L471VG
подробное описание детали  Batch acquisition mode
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производитель  STMICROELECTRONICS [STMicroelectronics]
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STM32L471VG датащи(HTML) 185 Page - STMicroelectronics

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STM32L471xx
Electrical characteristics
199
Table 88. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings(1)(2)
1. CL = 30 pF.
2. Guaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
2THCLK-0.5
2THCLK+0.5
ns
tv(NOE_NE)
FMC_NEx low to FMC_NOE low
0
1
tw(NOE)
FMC_NOE low time
2THCLK-0.5
2THCLK+1
th(NE_NOE)
FMC_NOE high to FMC_NE high hold time
0
-
tv(A_NE)
FMC_NEx low to FMC_A valid
-
3.5
th(A_NOE)
Address hold time after FMC_NOE high
0
-
tv(BL_NE)
FMC_NEx low to FMC_BL valid
-
2
th(BL_NOE)
FMC_BL hold time after FMC_NOE high
0
-
tsu(Data_NE)
Data to FMC_NEx high setup time
THCLK-1
-
tsu(Data_NOE)
Data to FMC_NOEx high setup time
THCLK-0.5
-
th(Data_NOE)
Data hold time after FMC_NOE high
0
-
th(Data_NE)
Data hold time after FMC_NEx high
0
-
tv(NADV_NE)
FMC_NEx low to FMC_NADV low
-
1
tw(NADV)
FMC_NADV low time
-
THCLK+0.5
Table 89. Asynchronous non-multiplexed SRAM/PSRAM/NOR read-NWAIT
timings(1)(2)
1. CL = 30 pF.
2. Guaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
7THCLK-0.5
7THCLK+0.5
ns
tw(NOE)
FMC_NWE low time
5THCLK-0.5
5THCLK+0.5
tw(NWAIT)
FMC_NWAIT low time
THCLK-0.5
-
tsu(NWAIT_NE) FMC_NWAIT valid before FMC_NEx high
5THCLK+2
-
th(NE_NWAIT) FMC_NEx hold time after FMC_NWAIT invalid
4THCLK
-



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