STM32L443CC datasheet(164/207 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32L443CC STM32L443RC STM32L443VC

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DocID028739 Rev 2

6.3.25

Timer characteristics

The parameters given in the following tables are guaranteed by design.

Refer to Section 6.3.14: I/O port characteristics for details on the input/output alternate

function characteristics (output compare, input capture, external clock, PWM output).

1. Guaranteed by design.

2. LCD enabled with 3 V internal step-up active, 1/8 duty, 1/4 bias, division ratio= 64, all pixels active, no LCD connected.

Table 78. TIMx(1) characteristics

1. TIMx, is used as a general term in which x stands for 1,2,3,4,5,6,7,8,15,16 or 17.

Symbol

Parameter

Conditions

Min

Max

Unit

tres(TIM)

Timer resolution time

-1

tTIMxCLK

fTIMxCLK = 80 MHz

12.5

fEXT

Timer external clock

frequency on CH1 to CH4

-0

fTIMxCLK/2

MHz

fTIMxCLK = 80 MHz

MHz

ResTIM

Timer resolution

TIMx (except

TIM2)

-16

bit

TIM2

tCOUNTER

16-bit counter clock

period

65536

tTIMxCLK

fTIMxCLK = 80 MHz 0.0125

819.2

µs

tMAX_COUNT

Maximum possible count

with 32-bit counter

65536 × 65536

tTIMxCLK

fTIMxCLK = 80 MHz

53.68

Table 79. IWDG min/max timeout period at 32 kHz (LSI)(1)

1. The exact timings still depend on the phasing of the APB interface clock versus the LSI clock so that there

is always a full RC period of uncertainty.

Prescaler divider

PR[2:0] bits

Min timeout RL[11:0]=

0x000

Max timeout RL[11:0]=

0xFFF

Unit

0.125

512

0.250

1024

/16

0.500

2048

/32

1.0

4096

/64

2.0

8192

/128

4.0

16384

/256

6 or 7

8.0

32768

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