TNETV2501INPGF datasheet(147/197 Pages) TI1

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Electrical Specifications

147

December 2002 − Revised November 2008

SPRS206K

5.7

Memory Timings

5.7.1 Asynchronous Memory Timings

Table 5−9 and Table 5−10 assume testing over recommended operating conditions (see Figure 5−8 and

Figure 5−9).

Table 5−9. Asynchronous Memory Cycle Timing Requirements for ECLKIN†‡

NO.

MIN

MAX

UNIT

tsu(EDV-AREH)

Setup time, EMIF.Dx valid before EMIF.ARE high

th(AREH-EDV)

Hold time, EMIF.Dx valid after EMIF.ARE high

tsu(ARDY-EKO1H)

Setup time, EMIF.ARDY valid before ECLKOUT1 high

3.5

th(EKO1H-ARDY)

Hold time, EMIF.ARDY valid after ECLKOUT1 high

† To ensure data setup time, simply program the strobe width wide enough. EMIF.ARDY is internally synchronized. The EMIF.ARDY signal is

recognized in the cycle for which the setup and hold time is met. To use EMIF.ARDY as an asynchronous input, the pulse width of the EMIF.ARDY

signal should be wide enough (e.g., pulse width = 2E) to ensure setup and hold time is met.

‡ RS = Read setup, RST = Read strobe, RH = Read hold, WS = Write setup, WST = Write strobe, WH = Write hold. These parameters are

programmed via the EMIF CE space control registers.

Table 5−10. Asynchronous Memory Cycle Switching Characteristics for ECLKOUT1‡§¶

NO.

PARAMETER

MIN

MAX

UNIT

tosu(SELV-AREL)

Output setup time, select signals valid to EMIF.ARE low

RS * E − 1.5

toh(AREH-SELIV)

Output hold time, EMIF.ARE high to select signals invalid

RH * E − 1.5

td(EKO1H-AREV)

Delay time, ECLKOUT1 high to EMIF.ARE valid

1.5

tosu(SELV-AWEL)

Output setup time, select signals valid to EMIF.AWE low

WS * E − 1.5

toh(AWEH-SELIV)

Output hold time, EMIF.AWE high to select signals invalid

WH * E − 1.5

A10

td(EKO1H-AWEV)

Delay time, ECLKOUT1 high to EMIF.AWE valid

1.5

‡ RS = Read setup, RST = Read strobe, RH = Read hold, WS = Write setup, WST = Write strobe, WH = Write hold. These parameters are

programmed via the EMIF CE space control registers.

§ E = ECLKOUT1 period in ns for EMIF.

¶ Select signals for EMIF include: EMIF.CEx, EMIF.BE[3:0], EMIF.A[21:2], and EMIF.AOE; and for EMIF writes, include EMIF.D[31:0].

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