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PC87366 датащи(PDF) 158 Page - National Semiconductor (TI) |
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PC87366 датащи(HTML) 158 Page - National Semiconductor (TI) |
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158 / 240 page ![]() 9.0 Game Port (GMP) (Continued) 158 www.national.com 9.3 GAME PORT REGISTERS The following abbreviations are used to indicate the Register Type: q R/W = Read/Write q R = Read from a specific address returns the value of a specific register. Write to the same address is to a different register. q W=Write q RO = Read Only q R/W1C = Read/Write 1 to Clear. Writing 1 to a bit clears it to 0. Writing 0 has no effect. 9.3.1 Game Port Register Map The following table lists the Game Port registers. for the Game Port register bitmap, see Section 9.4. Offset Mnemonic Register Name Type Section 00h GMPCTL Game Port Control R/W 9.3.2 01h GMPLST Game Port Legacy Status RO 9.3.3 02h GMPXST Game Port Extended Status R/W1C 9.3.4 03h GMPIEN Game Port Interrupt Enable R/W 9.3.5 04h GMPAXL Game Device A X Position Low Byte RO 9.3.6 05h GMPAXH Game Device A X Position High Byte RO 9.3.7 06h GMPAYL Game Device A Y Position Low Byte RO 9.3.8 07h GMPAYH Game Device A Y Position High Byte RO 9.3.9 08h GMPBXL Game Device B X Position Low Byte RO 9.3.10 09h GMPBXH Game Device B X Position High Byte RO 9.3.11 0Ah GMPBYL Game Device B Y Position Low Byte RO 9.3.12 0Bh GMPBYH Game Device B Y Position High Byte RO 9.3.13 0Ch GMPEPOL Game Port Event Polarity R/W 9.3.14 |
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