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EM357-RTR датащи(PDF) 203 Page - Silicon Laboratories

номер детали EM357-RTR
подробное описание детали  High-Performance, Integrated ZigBee/802.15.4 System-on-Chip
PDF  241 Pages
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производитель  SILABS [Silicon Laboratories]
домашняя страница  http://www.silabs.com
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EM357-RTR датащи(HTML) 203 Page - Silicon Laboratories

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Rev 1.3
203
12. Trace Port Interface Unit (TPIU)
The EM35x integrates the standard ARM® Trace Port Interface Unit (TPIU). The TPIU receives a data stream from
the on-chip trace data generated by the standard ARM® Instrument Trace Macrocell (ITM), buffers the data in a
FIFO, formats the data, and serializes the data to be sent off-chip through alternate functions of the GPIO. Since
the primary function of the TPIU is to provide a bridge between on-chip ARM system debug components and
external GPIO, the TPIU itself does not generate data. Figure 12.1 illustrates the three primary components of the
TPIU.
Figure 12.1. TPIU Block Diagram
The TPIU is composed of:

Asynchronous FIFO: The asynchronous FIFO receives a data stream generated by the ITM and enables
the trace data to be sent off-chip at a speed that is not dependent on the speed of the data source.

Formatter: The formatter inserts source ID signals into the data packet stream so that trace data can be re-
associated with its trace source. Since the EM35x has only one trace source, the ITM, it is not necessary to
use the formatter, and, therefore, the formatter only adds overhead into the data stream. Since certain
modes of the TPIU automatically enable the formatter, these modes should be avoided whenever possible.

Trace Out: The trace out block serializes the data and sends it off-chip by the proper alternate output GPIO
functions.
The six pins available to the TPIU are:

SWO

TRACECLK

TRACEDATA0

TRACEDATA1

TRACEDATA2

TRACEDATA3
Since these pins are alternate outputs of GPIO, refer to "19. Pin Definitions" on page 211 and "7. GPIO (General
Purpose Input/Output)" on page 50 for complete pin descriptions and configurations.
Notes:
1.
The SWO alternate output is mirrored on GPIO PC1 and PC2.
2.
GPIO PC1 shares both the SWO and TRACEDATA0 alternate outputs. This is possible because SWO and
TRACEDATA0 are mutually exclusive, and only one may be selected at a time in the trace-out block.
The Ember software utilizes the TPIU to efficiently output debug data. Altering the TPIU configuration may conflict
with Ember debug output.
For further information on the TPIU, contact Silicon Labs support for the ARM® CortexTM-M3 Technical Reference
Manual, the ARM® CoreSightTM Components Technical Reference Manual, the ARM® v7-M Architecture
Reference Manual, and the ARM® v7-M Architecture Application Level Reference Manual.
Asynchronous
FIFO
Formatter
ITM
Trace Out
(Serializer)
TRACECLK
TRACEDATA2
TRACEDATA3
TRACEDATA1
TRACEDATA0
SWO



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