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AT89C51CC03U-RDTIM датащи(PDF) 155 Page - ATMEL Corporation |
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AT89C51CC03U-RDTIM датащи(HTML) 155 Page - ATMEL Corporation |
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155 / 195 page ![]() 155 AT89C51CC03 4182I–CAN–06/05 Figure 75. A/D Converter Clock ADC Standby Mode When the ADC is not used, it is possible to set it in standby mode by clearing bit ADEN in ADCON register. In this mode its power dissipation is about 1 µW. IT ADC Management An interrupt end-of-conversion will occurs when the bit ADEOC is activated and the bit EADC is set. For re-arming the interrupt the bit ADEOC must be cleared by software. Figure 76. ADC Interrupt Structure Routines examples 1. Configure P1.2 and P1.3 in ADC channels // configure channel P1.2 and P1.3 for ADC ADCF = 0Ch // Enable the ADC ADCON = 20h 2. Start a standard conversion // The variable "channel" contains the channel to convert // The variable "value_converted" is an unsigned int // Clear the field SCH[2:0] ADCON and = F8h // Select channel ADCON | = channel // Start conversion in standard mode ADCON | = 08h // Wait flag End of conversion while((ADCON and 01h)! = 01h) // Clear the End of conversion flag ADCON and = EFh // read the value value_converted = (ADDH << 2)+(ADDL) 3. Start a precision conversion (need interrupt ADC) // The variable "channel" contains the channel to convert // Enable ADC Prescaler ADCLK A/D Converter ADC Clock CPU CLOCK CPU Core Clock Symbol ÷ 2 ADEOC ADCON.2 EADC IEN1.1 ADCI |
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