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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MB91F577BSPMC датащи(PDF) 115 Page - Cypress Semiconductor |
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MB91F577BSPMC датащи(HTML) 115 Page - Cypress Semiconductor |
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115 / 163 page  Document Number: 002-04725 Rev.*A Page 115 of 163 MB91570 Series 13.4 AC Characteristics 13.4.1 Main Clock Timing (TA: Recommended operating conditions, VCC5 = 5.0V±10%, VSS = DVSS = AVSS = 0.0V) Parameter Symbol Pin name Conditio ns Value Unit Remarks Min Typ Max Source oscillation clock frequency FC X0,X1 – – 4 – MHz Source oscillation clock cycle time tCYL X0,X1 – – 250 – ns Internal operating clock cycle time* FCP – – 2 – 80 MHz CPU clock FCPP – – 2 – 40 MHz Peripheral bus clock FCPT – – 2 – 40 MHz External bus clock Internal operating clock cycle time* tCP – – 12.5 – 500 ns CPU clock tCPP – – 25 – 500 ns Peripheral bus clock tCPT – – 25 – 500 ns External bus clock CAN PLL jitter (when lock) tPJ – – -10 – +10 ns FCP = 80MHz (4MHz×Multiplied by 20) Built-in CR oscillation frequency FCCR – – 50 100 200 kHz *: The maximum / minimum value is defined when using the main clock and PLL clock. X0,X1 clock timing CAN PLL jitter Deviation time from the ideal clock is assured per cycle out of 20, 000 cycles. tCYL X0 |
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