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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32L475RG датащи(PDF) 167 Page - STMicroelectronics |
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STM32L475RG датащи(HTML) 167 Page - STMicroelectronics |
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167 / 193 page  DocID027692 Rev 2 167/193 STM32L475xx Electrical characteristics 181 SAI characteristics Unless otherwise specified, the parameters given in Table 86 for SAI are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized inTable 22: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5 ₓ VDD Refer to Section 6.3.14: I/O port characteristics for more details on the input/output alternate function characteristics (CK,SD,FS). Table 86. SAI characteristics(1) Symbol Parameter Conditions Min Max Unit fMCLK SAI Main clock output - - 50 MHz fCK SAI clock frequency(2) Master transmitter 2.7 ≤ VDD ≤ 3.6 Voltage Range 1 -18.5 MHz Master transmitter 1.71 ≤ VDD ≤ 3.6 Voltage Range 1 -12.5 Master receiver Voltage Range 1 -25 Slave transmitter 2.7 ≤ VDD ≤ 3.6 Voltage Range 1 -22.5 Slave transmitter 1.71 ≤ VDD ≤ 3.6 Voltage Range 1 -14.5 Slave receiver Voltage Range 1 -25 Voltage Range 2 - 12.5 tv(FS) FS valid time Master mode 2.7 ≤ VDD ≤ 3.6 -22 ns Master mode 1.71 ≤ VDD ≤ 3.6 -40 th(FS) FS hold time Master mode 10 - ns tsu(FS) FS setup time Slave mode 1 - ns th(FS) FS hold time Slave mode 2 - ns tsu(SD_A_MR) Data input setup time Master receiver 2.5 - ns tsu(SD_B_SR) Slave receiver 3 - th(SD_A_MR) Data input hold time Master receiver 8 - ns th(SD_B_SR) Slave receiver 4 - |
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