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PC87373 датащи(PDF) 159 Page - National Semiconductor (TI) |
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PC87373 датащи(HTML) 159 Page - National Semiconductor (TI) |
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159 / 174 page ![]() 13.0 Device Characteristics (Continued) 159 www.national.com Revision 1.1 13.4.2 Reset Timing VSB Power-Up Reset Figure 47. Internal VSB Power-Up Reset - Ended by 32 KHz Clock Figure 48. Internal VSB Power-Up Reset - Ended by PCI_RESET Symbol Figure Description Reference Conditions Min1 1. Not tested. Guaranteed by design. Max1 tIRST 47 Internal Power-Up Reset Time VSB3 power-up to end of internal reset Ended by 32 KHz Clock Domain t32KW +t32KVAL 2 + 17 * tCP 2. t32KW +t32KVAL from VSB3 power-up to 32 KHz domain toggling; see Low-Frequency Clock Timing on page 162. 48 Ended by PCI_RESET tLRST tLRST 48 PCI_RESET active time VSB3 power-up to end of PCI_RESET 10 ms VSB3 (Power) (Internal) tIRST VSB3ONmin tCP t32KW + t32KVAL PCI_RESET VSB Power-Up Reset (Internal) 32 KHz Domain VSB3 (Power) (Internal) tIRST VSB3ONmin tCP t32KW + t32KVAL PCI_RESET VSB Power-Up Reset (Internal) 32 KHz Domain tLRST |
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