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OMAP3530ECUS датащи(PDF) 176 Page - Texas Instruments

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номер детали OMAP3530ECUS
подробное описание детали  OMAP3530 and OMAP3525 Applications Processors
PDF  265 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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OMAP3530ECUS датащи(HTML) 176 Page - Texas Instruments

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GPMC_FCLK
gpmc_ncsx
gpmc_nbe0_cle
gpmc_nadv_ale
gpmc_noe
gpmc_nwe
gpmc_a[16:1]_d[15:0]
DATA
GNF0
GNF1
GNF4
GNF6
GNF9
GNF3
030-035
GPMC_FCLK
gpmc_ncsx
gpmc_nbe0_cle
gpmc_nadv_ale
gpmc_noe
gpmc_a[16:1]_d[15:0]
gpmc_waitx
DATA
GNF10
GNF13
GNF14
GNF15
GNF12
030-034
OMAP3530, OMAP3525
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
www.ti.com
Figure 6-15. GPMC/NAND Flash – Data Read Cycle Timing(1) (2) (3)
(1) The GNF12 parameter illustrates amount of time required to internally sample input data. It is expressed in number of GPMC functional
clock cycles. From start of read cycle and after GNF12 functional clock cycles, input data is internally sampled by active functional clock
edge. The GNF12 value must be stored inside AccessTime register bit field.
(2) GPMC_FCLK is an internal clock (GPMC functional clock) not provided externally.
(3) In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7. In gpmc_waitx, x is equal to 0 ,1, 2, or 3.
In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7. In gpmc_waitx, x is equal to 0 or 1.
Figure 6-16. GPMC/NAND Flash – Data Write Cycle Timing
176
TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
Copyright © 2008–2013, Texas Instruments Incorporated
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Product Folder Links: OMAP3530 OMAP3525



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