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ST7MC1 датащи(PDF) 223 Page - STMicroelectronics |
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ST7MC1 датащи(HTML) 223 Page - STMicroelectronics |
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223 / 308 page ![]() ST7MC1/ST7MC2 223/308 MOTOR CONTROLLER (Cont’d) CONFIGURATION REGISTER (MCONF) Read/Write Reset Value: 0000 0010 (02h) Bits 7:4 = DS[3:0]: Delay for sampling at Ton These bits are used to define the delay inserted before sampling in order to sample during PWM ON time. Table 77. Sampling Delay Note: Times are indicated for 4 MHz fPERIPH Bit 3 = SOI Sampling Out Interrupt flag. This interrupt indicates that the sampling that should have been done during Ton has occured during the next Toff. In this case, the sample is dis- carded. 0: No Sampling Out Interrupt Pending 1: Sampling Out Interrupt Pending Bit 2 = SOM: Sampling Out Mask bit. This interrupt is available only for Z event sampling as D event sampling is always done at fSCF high frequency. 0: Sampling Out interrupt disabled 1: Sampling Out interrupt enabled This interrupt is available only when a delay has been set in the DS[3:0] bits in the MCONF register. Note: It is recommended to disable the sampling out interrupt when software Z event is enabled (SZ bit in MCRC register is set) and if the value in the DS[3:0] bits is modified to change the sampling method during the application. Bits [1:0] = XT16:XT8 BLDC drive Motor Control Peripheral input frequency selection: Table 78. Peripheral frequency Caution: It is recommended to set the peripheral frequency to 4MHz. Setting fPERIPH=fMTC is used mainly when fclk = 4MHz (for low power consump- tion). 7 6 5 43 21 0 DS3 DS2 DS1 DS0 SOI SOM XT16 XT8 DS3 DS2 DS1 DS0 Delay added to sample at Ton 0 0 0 0 No delay added. Sample during Toff 0 0 0 1 2.5 µs 00 10 5 µs 0 0 1 1 7.5 µs 0 1 0 0 10 µs 0 1 0 1 12.5 µs 0 1 1 0 15 µs 0 1 1 1 17.5 µs 1 0 0 0 20 µs 1 0 0 1 22.5 µs 1 0 1 0 25 µs 1 0 1 1 27.5 µs 11 00 30 µs 1 1 0 1 32.5 µs 11 10 35 µs 1 1 1 1 37.5 µs XT16 XT8 Peripheral frequency 00 fPERIPH=fMTC 01 fPERIPH=fMTC/2 10 fPERIPH=fMTC/4 11 fPERIPH=fMTC/4 (same as XT16=1,XT8=0) |
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