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GXM датащи(PDF) 189 Page - National Semiconductor (TI) |
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GXM датащи(HTML) 189 Page - National Semiconductor (TI) |
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189 / 244 page ![]() Revision 3.1 189 www.national.com Electrical Specifications (Continued) Table 7-9. PCI Interface Signals Figure 7-4. Output Timing Figure 7-5. Input Timing Symbol Parameter Min Max Unit Notes tVAL1 Delay Time, SYSCLK to Signal Valid for Bused Signals 211 ns tVAL2 Delay Time, SYSCLK to Signal Valid for GNT# 2 12 ns Note tON Delay Time, Float to Active 2 ns tOFF Delay Time, Active to Float 28 ns tSU1 Input Setup Time for Bused Signals 7 ns tSU2 Input Setup Time for REQ# 12 ns Note tH Input Hold Time to SYSCLK 0 ns Note: GNT# and REQ# are point-to-point signals. All other PCI interface signals are bused. Refer to Chapter 4 of PCI Local Bus Specification, Revision 2.1, for more detailed information. SYSCLK TRISTATE OUTPUT OUTPUT tVAL1,2 tOFF tON SYSCLK INPUT tH tSU1,2 |
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