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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M38B53M4-059FP датащи(PDF) 174 Page - Mitsubishi Electric Semiconductor |
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M38B53M4-059FP датащи(HTML) 174 Page - Mitsubishi Electric Semiconductor |
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174 / 355 page  38B5 Group User’s Manual 2-86 APPLICATION 2.4 FLD controller Fig. 2.4.4 Structure of FLD mode register FLDC mode register b7 b6 b5 b4 b3 b2 b1 b0 FLDC mode register (FLDM: address 0EF416) b 0 Name 0 Functions At reset R W 1 0 Display start bit 0 : Display stopped 1 : Display in progress (display starts by writing “1”) 2 0 Tscan control bits b3 b2 0 0 : 0 FLD digit interrupt (at rising edge of each digit) 0 1 : 1 ! Tdisp 1 0 : 2 ! Tdisp 1 1 : 3 ! Tdisp FLD blanking interrupt (at falling edge of last digit) 3 6 7 0 0 0 4 Notes 1: When the gradation display mode is selected, the number of timing is max. 16 timing. (Set “0” to the timing number control bit (b4).) 2: When switching the timing number control bit (b4) or the gradation display mode selection control bit (b5), set “0” to the display start bit (b1) (display stop state) before that. Automatic display control bit (P0, P1, P2, P3, P8) 0 : General-purpose mode 1 : Automatic display mode 0 : 16 timing mode 1 : 32 timing mode (Note 2) 0 : Not selected 1 : Selected (Notes 1, 2) 0 : f(XIN)/16 or f(XCIN)/32 1 : f(XIN)/64 or f(XCIN)/128 0 0 Timing number control bit 5 Gradation display mode selection control bit Tdisp counter count source selection bit High-breakdown voltage port driv- ability selection bit 0 : Drivability strong 1 : Drivability weak |
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