64GA106 datasheet(245/330 Pages) MICROCHIP

245 / 330 page

 2010 Microchip Technology Inc.

DS39905E-page 245

PIC24FJ256GA110 FAMILY

25.0

SPECIAL FEATURES

PIC24FJ256GA110 family devices include several

features intended to maximize application flexibility and

reliability, and minimize cost through elimination of

external components. These are:

• Flexible Configuration

• Watchdog Timer (WDT)

• Code Protection

• JTAG Boundary Scan Interface

• In-Circuit Serial Programming

• In-Circuit Emulation

25.1

Configuration Bits

The Configuration bits can be programmed (read as ‘0’),

or left unprogrammed (read as ‘1’), to select various

device configurations. These bits are mapped starting at

program memory location F80000h. A detailed explana-

tion of the various bit functions is provided in

Note that address F80000h is beyond the user program

memory space. In fact, it belongs to the configuration

memory space (800000h-FFFFFFh) which can only be

accessed using table reads and table writes.

25.1.1

CONSIDERATIONS FOR

CONFIGURING PIC24FJ256GA110

FAMILY DEVICES

In PIC24FJ256GA110 family devices, the configuration

bytes are implemented as volatile memory. This means

that configuration data must be programmed each time

the device is powered up. Configuration data is stored

in the three words at the top of the on-chip program

memory space, known as the Flash Configuration

Words. Their specific locations are shown in

Table 25-1. These are packed representations of the

actual device Configuration bits, whose actual

locations are distributed among several locations in

configuration space. The configuration data is automat-

ically loaded from the Flash Configuration Words to the

proper Configuration registers during device Resets.

When creating applications for these devices, users

should always specifically allocate the location of the

Flash Configuration Word for configuration data. This is

to make certain that program code is not stored in this

address when the code is compiled.

The upper byte of all Flash Configuration Words in pro-

gram memory should always be ‘1111 1111’. This

makes them appear to be NOP instructions in the

remote event that their locations are ever executed by

accident. Since Configuration bits are not implemented

in the corresponding locations, writing ‘1’s to these

locations has no effect on device operation.

TABLE 25-1:

FLASH CONFIGURATION WORD LOCATIONS FOR PIC24FJ256GA110 FAMILY

DEVICES

Note:

This data sheet summarizes the features

of this group of PIC24F devices. It is not

intended to be a comprehensive refer-

ence source. For more information, refer

to the following sections of the “PIC24F

Family Reference Manual”

• Section 9. “Watchdog Timer (WDT)”

(DS39697)

• Section 32. “High-Level Device

Integration”

(DS39719)

• Section 33. “Programming and

Diagnostics”

(DS39716)

Note:

Configuration data is reloaded on all types

of device Resets.

Note:

Performing a page erase operation on the

last page of program memory clears the

Flash Configuration Words, enabling code

protection as a result. Therefore, users

should avoid performing page erase

operations on the last page of program

memory.

Device

Configuration Word Addresses

PIC24FJ64GA1

ABFEh

ABFCh

ABFAh

PIC24FJ128GA1

157FEh

157FC

157FA

PIC24FJ192GA1

20BFEh

20BFC

20BFA

PIC24FJ256GA1

2ABFEh

2ABFC

2ABFA

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