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OMAP3530ECBC датащи(PDF) 167 Page - Texas Instruments

номер детали OMAP3530ECBC
подробное описание детали  OMAP3530/25 Applications Processor: OMAP 3 Architecture
PDF  264 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI1 - Texas Instruments

OMAP3530ECBC датащи(HTML) 167 Page - Texas Instruments

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GPMC_FCLK
gpmc_clk
gpmc_ncsx
gpmc_a[10:1]
gpmc_nbe0_cle
gpmc_nbe1
gpmc_nadv_ale
gpmc_noe
gpmc_d[15:0]
gpmc_waitx
gpmc_io_dir
Address0
Address1
Valid
Valid
Valid
Valid
DataUpper
OUT
OUT
IN
OUT
IN
FA9
FA10
FA3
FA9
FA3
FA13
FA13
FA1
FA1
FA4
FA4
FA12
FA12
FA10
FA0
FA0
FA16
FA0
FA0
FA10
FA10
FA5
FA5
030-027
FA15
FA15
FA14
FA14
OMAP3530/25 Applications Processor
www.ti.com
SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009
Figure 6-8. GPMC/NOR Flash – Asynchronous Read – 32-bit Timing(1)(2)(3)
(1) In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7. In gpmc_waitx, x is equal to 0, 1, 2, or 3.
(2) FA5 parameter illustrates amount of time required to internally sample input data. It is expressed in number of GPMC functional clock
cycles. From start of read cycle and after FA5 functional clock cycles, input data is internally sampled by active functional clock edge.
FA5 value must be stored inside AccessTime register bit field.
(3) GPMC_FCLK is an internal clock (GPMC functional clock) not provided externally.
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TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
167



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