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INTEDG датащи(PDF) 410 Page - Microchip Technology

номер детали INTEDG
подробное описание детали  64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology
PDF  478 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
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INTEDG датащи(HTML) 410 Page - Microchip Technology

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PIC16(L)F1946/47
DS41414D-page 410
 2010-2012 Microchip Technology Inc.
TABLE 30-8:
PIC16(L)F1946/47 A/D CONVERTER (ADC) CHARACTERISTICS(1,2,3):
TABLE 30-9:
PIC16(L)F1946/47 A/D CONVERSION REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
TA
25°C
Param
No.
Sym.
Characteristic
Min.
Typ†
Max. Units
Conditions
AD01
NR
Resolution
—
—
10
bit
AD02
EIL
Integral Error
—
—
±1.7
LSb VREF = 3.0V
AD03
EDL
Differential Error
—
—
±1
LSb No missing codes
VREF = 3.0V
AD04
EOFF Offset Error
—
—
±2.5
LSb VREF = 3.0V
AD05
EGN
Gain Error
—
—
±2.0
LSb VREF = 3.0V
AD06
VREF Reference Voltage(4)
1.8
—
VDD
VVREF = (VREF+ minus VREF-)
AD07
VAIN
Full-Scale Range
VSS
—VREF
V
AD08
ZAIN
Recommended Impedance of
Analog Voltage Source
——
10
k
 Can go higher if external 0.01
F capacitor is
present on input pin.
†
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: Total Absolute Error includes integral, differential, offset and gain errors.
2: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
3: When ADC is off, it will not consume any current other than leakage current. The power-down current specification
includes any such leakage from the ADC module.
4: ADC Reference Voltage (Ref+) is the selected reference input, VREF+ pin, VDD pin or the FVR Buffer1. When the FVR is
selected as the reference input, the FVR Buffer1 output selection must be 2.048V or 4.096V, (ADFVR<1:0> = 1x).
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C
 TA  +125°C
Param
No.
Sym.
Characteristic
Min.
Typ†
Max.
Units
Conditions
AD130* TAD
A/D Clock Period
1.0
—
9.0
sTOSC-based
A/D Internal RC Oscillator
Period
1.0
2.5
6.0
s
ADCS<1:0> = 11 (ADRC mode)
AD131
TCNV
Conversion Time (not including
Acquisition Time)(1)
—11
—
TAD
Set GO/DONE bit to conversion
complete
AD132* TACQ
Acquisition Time
—
5.0
—
s
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: The ADRES register may be read on the following TCY cycle.



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