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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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INTEDG датащи(PDF) 342 Page - Microchip Technology |
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INTEDG датащи(HTML) 342 Page - Microchip Technology |
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342 / 478 page  PIC16(L)F1946/47 DS41414D-page 342 2010-2012 Microchip Technology Inc. 27.3 LCD Clock Source Selection The LCD module has 3 possible clock sources: •FOSC/256 •T1OSC •LFINTOSC The first clock source is the system clock divided by 256 (FOSC/256). This divider ratio is chosen to provide about 1 kHz output when the system clock is 8 MHz. The divider is not programmable. Instead, the LCD prescaler bits LP<3:0> of the LCDPS register are used to set the LCD frame clock rate. The second clock source is the T1OSC. This also gives about 1 kHz when a 32.768 kHz crystal is used with the Timer1 oscillator. To use the Timer1 oscillator as a clock source, the T1OSCEN bit of the T1CON register should be set. The third clock source is the 31 kHz LFINTOSC, which provides approximately 1 kHz output. The second and third clock sources may be used to continue running the LCD while the processor is in Sleep. Using bits CS<1:0> of the LCDCON register can select any of these clock sources. 27.3.1 LCD PRESCALER A 4-bit counter is available as a prescaler for the LCD clock. The prescaler is not directly readable or writable; its value is set by the LP<3:0> bits of the LCDPS register, which determine the prescaler assignment and prescale ratio. The prescale values are selectable from 1:1 through 1:16. FIGURE 27-2: LCD CLOCK GENERATION CS<1:0> T1OSC 32 kHz Crystal Osc. LFINTOSC Nominal = 31 kHz Static 1/2 1/3, 1/4 ÷4 LMUX<1:0> 4-bit Prog ÷1, 2, 3, 4 Ring Counter ÷256 FOSC ÷2 ÷ 32 LP<3:0> Prescaler To Ladder Power Control Segment Clock Counter |
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