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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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INTEDG датащи(PDF) 334 Page - Microchip Technology |
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INTEDG датащи(HTML) 334 Page - Microchip Technology |
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334 / 478 page  PIC16(L)F1946/47 DS41414D-page 334 2010-2012 Microchip Technology Inc. TABLE 26-3: SUMMARY OF REGISTERS ASSOCIATED WITH CAPACITIVE SENSING REGISTER 26-2: CPSCON1: CAPACITIVE SENSING CONTROL REGISTER 1 U-0 U-0 U-0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 — — — CPSCH<4:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-5 Unimplemented: Read as ‘0’ bit 4-0 CPSCH<4:0>: Capacitive Sensing Channel Select bits If CPSON = 0: These bits are ignored. No channel is selected. If CPSON = 1: 00000 = channel 0, (CPS0) 00001 = channel 1, (CPS1) 00010 = channel 2, (CPS2) 00011 = channel 3, (CPS3) 00100 = channel 4, (CPS4) 00101 = channel 5, (CPS5) 00110 = channel 6, (CPS6) 00111 = channel 7, (CPS7) 01000 = channel 8, (CPS8) 01001 = channel 9, (CPS9) 01010 = channel 10, (CPS10) 01011 = channel 11, (CPS11) 01100 = channel 12, (CPS12) 01101 = channel 13, (CPS13) 01110 = channel 14, (CPS14) 01111 = channel 15, (CPS15) 10000 = channel 16, (CPS16) 10001 = Reserved. Do not use. . . . 11111 = Reserved. Do not use. Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page ANSELA — — ANSA5 ANSA4 ANSA3 ANSA2 ANSA1 ANSA0 132 CPSCON0 CPSON CPSRM — — CPSRNG<1:0> CPSOUT T0XCS 333 CPSCON1 — — — CPSCH<4:0> 334 OPTION_REG WPUEN INTEDG TMR0CS TMR0SE PSA PS2 PS1 PS0 197 T1CON TMR1CS<1:0> T1CKPS<1:0> T1OSCEN T1SYNC —TMR1ON 207 TRISA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 131 TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 134 TRISD TRISD<7:0> 140 Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the CPS module. |
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