PIC16F720-ESLASHML datasheet(198/244 Pages) MICROCHIP

198 / 244 page

PIC16F/LF720/721

DS41430A-page 198

 2010 Microchip Technology Inc.

TABLE 23-2:

OSCILLATOR PARAMETERS(1)

TABLE 23-1:

CLOCK OSCILLATOR TIMING REQUIREMENTS

Standard Operating Conditions (unless otherwise stated)

Operating temperature

-40°C

 TA  +125°C

Param

No.

Sym.

Characteristic

Min.

Typ†

Max.

Units

Conditions

OS01

FOSC

External CLKIN Frequency(1)

—

MHz

EC Oscillator mode

OS02

TOSC

External CLKIN Period(1)

—



EC Oscillator mode

OS03

TCY

Instruction Cycle Time(1)

250

TCY

TCY = 4/FOSC

These parameters are characterized but not tested.

†

Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are

not tested.

Note 1: Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values are based on

characterization data for that particular oscillator type under standard operating conditions with the device executing

code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current

consumption. All devices are tested to operate at “min” values with an external clock applied to CLKIN pin. When an

external clock input is used, the “max” cycle time limit is “DC” (no clock) for all devices.

Standard Operating Conditions (unless otherwise stated)

Operating Temperature -40°C

TA +125°C

Param

No.

Sym

Characteristic

Freq

Tolerance

Min

Typ†

Max

Units

Conditions

OS08

HFOSC

Internal Calibrated HFINTOSC

Frequency(2, 3)

2%

—

16.0

—

MHz 0°C

 TA  +85°C,

VDD

2.5V

3%

—

16.0

—

MHz +60°C

 TA  +85°C,

VDD

2.5V

5%

—

16.0

—

MHz -40°C

 TA  +125°C,

VDD

2.5V

OS08

MFOSC

Internal Calibrated MFINTOSC

Frequency(2, 3)

2%

—

500

—

kHz

0°C

 TA  +85°C,

VDD

2.5V

3%

—

500

—

kHz

+60°C

 TA  +85°C,

VDD

2.5V

5%

—

500

—

kHz

-40°C

 TA  +125°C,

VDD

2.5V

OS10* TIOSC ST HFINTOSC 16 MHz and

500 kHz

Oscillator Wake-up from Sleep

Start-up Time

——

s

These parameters are characterized but not tested.

†

Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance

only and are not tested.

Note 1: All specified values are based on characterization data for that particular oscillator type under standard

operating conditions with the device executing code. Exceeding these specified limits may result in an

unstable oscillator operation and/or higher than expected current consumption. All devices are tested to

operate at ‘min’ values with an external clock applied to the OSC1 pin. When an external clock input is used,

the ‘max’ cycle time limit is ‘DC’ (no clock) for all devices.

2: To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to

the device as possible. 0.1

F and 0.01 F values in parallel are recommended.

3: The frequency tolerance of the internal oscillator is ±2% from 0-60°C and ±3% from 60-85°C (see

Figure 23-6).

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