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TMS320DM647 датащи(PDF) 107 Page - Texas Instruments |
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TMS320DM647 датащи(HTML) 107 Page - Texas Instruments |
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107 / 181 page ![]() AECLKOUT ACEx ABE[1:0] AEA[23:0]/ ABA[1:0] AED[15:0] AAOEASOE / AR/W AAWEASWE / AARDY ByteEnables Address ReadData Hold=1 2 Strobe=4 Setup=1 2 2 4 10 10 1 1 1 3 DEASSERTED AECLKOUT ACEx ABE[1:0] AEA[23:0]/ ABA[1:0] AED[15:0] AAOEASOE / (A) AR/W AAWEASWE / (A) AARDY (B) ByteEnables Address WriteData Hold=1 12 Strobe=4 Setup=1 12 12 12 12 13 13 11 11 11 11 11 DEASSERTED TMS320DM647 TMS320DM648 www.ti.com SPRS372F – JANUARY 2010 – REVISED SEPTEMBER 2009 A. AAOE/ASOE and AAWE/ASWE operate as AAOE/ASOE (identified under select signals) and AAWE/ASWE, respectively, during asynchronous memory accesses. B. Polarity of the AARDY signal is programmable through the AP field of the EMIFA Async Wait Cycle Configuration register (AWCC). Figure 6-21. Asynchronous Memory Read Timing for EMIFA A. AAOE/ASOE and AAWE/ASWE operate as AAOE/ASOE and AAWE/ASWE (identified under select signals) during asynchronous memory accesses. B. Polarity of the AARDY signal is programmable through the AP field of the EMIFA Async Wait Cycle Configuration register (AWCC). Figure 6-22. Asynchronous Memory Write Timing for EMIFA Copyright © 2010–2009, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 107 Submit Documentation Feedback Product Folder Link(s): TMS320DM647 TMS320DM648 |
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