HCS12 datasheet(266/452 Pages) FREESCALE

266 / 452 page

Instruction Glossary

S12CPUV2 Reference Manual, Rev. 4.0

266

Freescale Semiconductor

Operation:

Description:

Shifts all bits of memory location M one place to the right. Bit 7 is loaded

from the C status bit. The C bit is loaded from the least significant bit of M.

Rotate operations include the carry bit to allow extension of shift and rotate

operations to multiple bytes. For example, to shift a 24-bit value one bit to

the right, the sequence LSR HIGH, ROR MID, and ROR LOW could be used

where LOW, MID, and HIGH refer to the low-order, middle, and high-order

bytes of the 24-bit value, respectively.

ROR

Rotate Right Memory

ROR

b7 – – – – – – b0

CCR Details:

HIN

––––

∆∆∆∆

N: Set if MSB of result is set; cleared otherwise

Z: Set if result is $00; cleared otherwise

V: N

⊕ C = [N • C] + [N • C] (for N and C after the shift)

Set if (N is set and C is cleared) or (N is cleared and C is set);

cleared otherwise (for values of N and C after the shift)

C: M0

Set if the LSB of M was set before the shift; cleared otherwise

Source Form

Address

Mode

Object Code

Access Detail

HCS12

M68HC12

ROR opr16a

ROR oprx0_xysp

ROR oprx9,xysp

ROR oprx16,xysp

ROR [D,xysp]

ROR [oprx16,xysp]

EXT

IDX

IDX1

IDX2

[D,IDX]

[IDX2]

76 hh ll

66 xb

66 xb ff

66 xb ee ff

66 xb

66 xb ee ff

rPwO

rPw

rPwO

frPwP

fIfrPw

fIPrPw

rOPw

rPw

rPOw

frPPw

fIfrPw

fIPrPw

HCS12 датащи(PDF) 266 Page - Freescale Semiconductor, Inc

HCS12 датащи(HTML) 266 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL