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PIC12F1822-I/MF датащи(PDF) 226 Page - Microchip Technology |
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PIC12F1822-I/MF датащи(HTML) 226 Page - Microchip Technology |
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226 / 398 page ![]() PIC12F/LF1822/16F/LF1823 DS41413A-page 226 Preliminary 2010 Microchip Technology Inc. The I2C interface supports the following modes and features: •Master mode • Slave mode • Byte NACKing (Slave mode) • Limited Multi-master support • 7-bit and 10-bit addressing • Start and Stop interrupts • Interrupt masking • Clock stretching • Bus collision detection • General call address matching •Address masking • Address Hold and Data Hold modes • Selectable SDA hold times Figure 24-2 is a block diagram of the I2C interface mod- ule in Master mode. Figure 24-3 is a diagram of the I2C interface module in Slave mode. FIGURE 24-2: MSSP1 BLOCK DIAGRAM (I2C™ MASTER MODE) Read Write SSP1SR Start bit, Stop bit, Start bit detect, SSP1BUF Internal data bus Set/Reset: S, P, SSP1STAT, WCOL, SSP1OV Shift Clock MSb LSb SDA Acknowledge Generate (SSP1CON2) Stop bit detect Write collision detect Clock arbitration State counter for end of XMIT/RCV SCL SCL in Bus Collision SDA in [SSP1M 3:0] Baud rate Reset SEN, PEN (SSP1CON2) generator (SSP1ADD) Address Match detect Set SSP1IF, BCL1IF |
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