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PIC12F1822-I/MF датащи(PDF) 219 Page - Microchip Technology

номер детали PIC12F1822-I/MF
подробное описание детали  8/14-Pin Flash Microcontrollers with nanoWatt XLP Technology
PDF  398 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC12F1822-I/MF датащи(HTML) 219 Page - Microchip Technology

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 2010 Microchip Technology Inc.
Preliminary
DS41413A-page 219
PIC12F/LF1822/16F/LF1823
23.4.6.1
Steering Synchronization
The STR1SYNC bit of the PSTR1CON register gives
the user two selections of when the steering event will
happen. When the STR1SYNC bit is ‘0’, the steering
event will happen at the end of the instruction that
writes to the PSTR1CON register. In this case, the
output signal at the output pins may be an incomplete
PWM waveform. This operation is useful when the user
firmware needs to immediately remove a PWM signal
from the pin.
When the STR1SYNC bit is ‘1’, the effective steering
update will happen at the beginning of the next PWM
period. In this case, steering on/off the PWM output will
always produce a complete PWM waveform.
Figures 23-19 and 23-20 illustrate the timing diagrams
of the PWM steering depending on the STR1SYNC
setting.
23.4.7
START-UP CONSIDERATIONS
When any PWM mode is used, the application
hardware must use the proper external pull-up and/or
pull-down resistors on the PWM output pins.
The CCP1M<1:0> bits of the CCP1CON register allow
the user to choose whether the PWM output signals are
active-high or active-low for each pair of PWM output
pins (P1A/P1C and P1B/P1D). The PWM output
polarities must be selected before the PWM pin output
drivers
are
enabled.
Changing
the
polarity
configuration while the PWM pin output drivers are
enable is not recommended since it may result in
damage to the application circuits.
The P1A, P1B, P1C and P1D output latches may not be
in the proper states when the PWM module is
initialized. Enabling the PWM pin output drivers at the
same time as the Enhanced PWM modes may cause
damage to the application circuit. The Enhanced PWM
modes must be enabled in the proper Output mode and
complete a full PWM cycle before enabling the PWM
pin output drivers. The completion of a full PWM cycle
is indicated by the TMR2IF bit of the PIR1 register
being set as the second PWM period begins.
FIGURE 23-19:
EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STR1SYNC = 0)
FIGURE 23-20:
EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION
(STR1SYNC = 1)
Note:
When the microcontroller is released from
Reset, all of the I/O pins are in the high-
impedance state. The external circuits
must keep the power switch devices in the
Off state until the microcontroller drives
the I/O pins with the proper signal levels or
activates the PWM output(s).
PWM
P1n = PWM
STR1
P1<D:A>
PORT Data
PWM Period
PORT Data
PWM
PORT Data
P1n = PWM
STR1
P1<D:A>
PORT Data



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