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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC12F1822-I/MF датащи(PDF) 201 Page - Microchip Technology |
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PIC12F1822-I/MF датащи(HTML) 201 Page - Microchip Technology |
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201 / 398 page  2010 Microchip Technology Inc. Preliminary DS41413A-page 201 PIC12F/LF1822/16F/LF1823 23.1.5 CAPTURE DURING SLEEP Capture mode depends upon the Timer1 module for proper operation. There are two options for driving the Timer1 module in Capture mode. It can be driven by the instruction clock (FOSC/4), or by an external clock source. When Timer1 is clocked by FOSC/4, Timer1 will not increment during Sleep. When the device wakes from Sleep, Timer1 will continue from its previous state. Capture mode will operate during Sleep when Timer1 is clocked by an external clock source. TABLE 23-2: SUMMARY OF REGISTERS ASSOCIATED WITH CAPTURE Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page CCP1CON P1M<1:0> DC1B<1:0> CCP1M<3:0> 221 CCPR1L Capture/Compare/PWM Register x Low Byte (LSB) 200 CCPR1H Capture/Compare/PWM Register x High Byte (MSB) 200 INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 89 PIE1 TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 90 PIE2 OSFIE C2IE(1) C1IE EEIE BCL1IE — — —91 PIR1 TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF 92 PIR2 OSFIF C2IF(1) C1IF EEIF BCL1IF — — —93 T1CON TMR1CS<1:0> T1CKPS<1:0> T1OSCEN T1SYNC —TMR1ON 180 T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/DONE T1GVAL T1GSS<1:0> 181 TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register 172 TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register 172 TRISA — — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 121 TRISC(1) — —TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 125 Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by Capture mode. Note 1: PIC16F/LF1823 only. |
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