X88C64

5

Page Write Timing Sequence for

WR Controlled Operation

(2) Although it is not illustrated, the microcontroller may interleave read operations between the individual byte writes within the page

write operation. Two responses are possible:

single memory component as both program and data storage.

PAGE WRITE OPERATION

Regardless of the microcontroller employed, the X88C64

supports page mode write operations. This allows the

microcontroller to write from one to thirty-two bytes of

data to the X88C64. Each individual write within a page

write operation must conform to the byte write timing

requirements. The falling edge of

WR starts a timer

delaying the internal programming cycle 100

µs. There-

fore, each successive write operation must begin within

100

µs of the last byte written. The following waveforms

illustrate the sequence and timing requirements.

3867 FHD F08

tBLC

CE

ALE

A/D0–A/D7

A8–A12

WR

PSEN(RD)

AIN

DIN

A12=n

OPERATION

BYTE 0

BYTE 1

BYTE 2

LAST BYTE

READ (1)(2)

AFTER tWC READY FOR

NEXT WRITE OPERATION

tWC

AIN

DIN

A12=n

AIN

DIN

A12=n

AIN

DIN

A12=n

AIN DOUT

A12=x

AIN

ADDR

AIN

Next Address