ATtiny13A datasheet(169/174 Pages) ATMEL

169 / 174 page

8126D–AVR–11/09

ATtiny13A

Table of Contents

Features ..................................................................................................... 1

Pin Configurations ................................................................................... 2

1.1

Pin Description ..................................................................................................3

Overview ................................................................................................... 4

2.1

Block Diagram ...................................................................................................4

About ......................................................................................................... 6

3.1

Resources .........................................................................................................6

3.2

Code Examples .................................................................................................6

3.3

Data Retention ...................................................................................................6

4CPU Core .................................................................................................. 7

4.1

Architectural Overview .......................................................................................7

4.2

ALU – Arithmetic Logic Unit ...............................................................................8

4.3

Status Register ..................................................................................................8

4.4

General Purpose Register File ........................................................................10

4.5

Stack Pointer ...................................................................................................11

4.6

Instruction Execution Timing ...........................................................................12

4.7

Reset and Interrupt Handling ...........................................................................12

Memories ................................................................................................ 15

5.1

In-System Reprogrammable Flash Program Memory .....................................15

5.2

SRAM Data Memory ........................................................................................15

5.3

EEPROM Data Memory ..................................................................................16

5.4

I/O Memory ......................................................................................................20

5.5

System Clock and Clock Options ......................................................... 23

6.1

Clock Systems and their Distribution ...............................................................23

6.2

Clock Sources .................................................................................................24

6.3

System Clock Prescaler ..................................................................................26

6.4

Power Management and Sleep Modes ................................................. 30

7.1

Sleep Modes ....................................................................................................30

7.2

Software BOD Disable .....................................................................................31

7.3

Power Reduction Register ...............................................................................31

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