ATtiny45 datasheet(144/196 Pages) ATMEL

144 / 196 page

144

7598H–AVR–07/09

ATtiny25/45/85

21.8

High-voltage Serial Programming Algorithm Sequence

To program and verify the ATtiny25/45/85 in the High-voltage Serial Programming mode, the fol-

lowing sequence is recommended (See instruction formats in Table 21-16):

21.8.1

Enter High-voltage Serial Programming Mode

The following algorithm puts the device in High-voltage Serial Programming mode:

Apply 4.5 - 5.5V between V

CC and GND.

Set RESET pin to “0” and toggle SCI at least six times.

Set the Prog_enable pins listed in Table 21-14 to “000” and wait at least 100 ns.

Apply V

HVRST - 5.5V to RESET. Keep the Prog_enable pins unchanged for at least

HVRST after the High-voltage has been applied to ensure the Prog_enable signature has

been latched.

Shortly after latching the Prog_enable signature, the device will activly output data on

the Prog_enable[2]/SDO pin, and the resulting drive contention may increase the power

consumption. To minimize this drive contention, release the Prog_enable[2] pin after

HVRST has elapsed.

Wait at least 50 µs before giving any serial instructions on SDI/SII.

21.8.2

Considerations for Efficient Programming

The loaded command and address are retained in the device during programming. For efficient

programming, the following should be considered.

• The command needs only be loaded once when writing or reading multiple memory

locations.

• Skip writing the data value 0xFF that is the contents of the entire EEPROM (unless the

EESAVE Fuse is programmed) and Flash after a Chip Erase.

• Address High byte needs only be loaded before programming or reading a new 256 word

window in Flash or 256 byte EEPROM. This consideration also applies to Signature bytes

reading.

21.8.3

Chip Erase

The Chip Erase will erase the Flash and EEPROM

(1) memories plus Lock bits. The Lock bits are

not reset until the Program memory has been completely erased. The Fuse bits are not

changed. A Chip Erase must be perfor med before the Flash and/or EEPROM are

re-programmed.

Note:

1. The EEPROM memory is preserved during Chip Erase if the EESAVE Fuse is programmed.

Load command “Chip Erase” (see Table 21-16).

Wait after Instr. 3 until SDO goes high for the “Chip Erase” cycle to finish.

Load Command “No Operation”.

Table 21-15. High-voltage Reset Characteristics

Supply Voltage

RESET Pin High-voltage Threshold

Minimum High-voltage Period for

Latching Prog_enable

VCC

VHVRST

tHVRST

4.5V

11.5V

100 ns

5.5V

11.5V

100 ns

ATtiny45 датащи(PDF) 144 Page - ATMEL Corporation

ATtiny45 датащи(HTML) 144 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL