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ATmega128 датащи(PDF) 290 Page - ATMEL Corporation |
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ATmega128 датащи(HTML) 290 Page - ATMEL Corporation |
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290 / 386 page ![]() 290 2467S–AVR–07/09 ATmega128 Parallel Programming Parameters, Pin Mapping, and Commands This section describes how to parallel program and verify Flash Program memory, EEPROM Data memory, Memory Lock bits, and Fuse bits in the ATmega128. Pulses are assumed to be at least 250 ns unless otherwise noted. Signal Names In this section, some pins of the ATmega128 are referenced by signal names describing their functionality during parallel programming, see Figure 135 and Table 120. Pins not described in the following table are referenced by pin names. The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse. The bit coding is shown in Table 122. When pulsing WR or OE, the command loaded determines the action executed. The different Commands are shown in Table 123. Figure 135. Parallel Programming Table 120. Pin Name Mapping Signal Name in Programming Mode Pin Name I/O Function RDY/BSY PD1 O 0: Device is busy programming, 1: Device is ready for new command OE PD2 I Output Enable (Active low) WR PD3 I Write Pulse (Active low) BS1 PD4 I Byte Select 1 (“0” selects low byte, “1” selects high byte) XA0 PD5 I XTAL Action Bit 0 VCC +5V GND XTAL1 PD1 PD2 PD3 PD4 PD5 PD6 PB7 - PB0 DATA RESET PD7 +12 V BS1 XA0 XA1 OE RDY/BSY PAGEL PA0 WR BS2 AVCC +5V |
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