ATmega162 datasheet(252/324 Pages) ATMEL

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252

2513K–AVR–07/09

ATmega162/V

AVR_RESET (0xC)

The AVR specific public JTAG instruction for setting the AVR device in the Reset mode or taking

the device out from the Reset mode. The TAP controller is not reset by this instruction. The one

bit Reset Register is selected as data register. Note that the reset will be active as long as there

is a logic “one” in the Reset Chain. The output from this chain is not latched.

The active states are:

•

Shift-DR: The Reset Register is shifted by the TCK input.

PROG_ENABLE (0x4)

The AVR specific public JTAG instruction for enabling programming via the JTAG port. The 16-

bit Programming Enable Register is selected as data register. The active states are the

following:

•

Shift-DR: The programming enable signature is shifted into the Data Register.

•

Update-DR: The programming enable signature is compared to the correct value, and

Programming mode is entered if the signature is valid.

PROG_COMMANDS

(0x5)

The AVR specific public JTAG instruction for entering programming commands via the JTAG

port. The 15-bit Programming Command Register is selected as data register. The active states

are the following:

•

Capture-DR: The result of the previous command is loaded into the Data Register.

•

Shift-DR: The Data Register is shifted by the TCK input, shifting out the result of the

previous command and shifting in the new command.

•

Update-DR: The programming command is applied to the Flash inputs.

•

Run-Test/Idle: One clock cycle is generated, executing the applied command (not always

required, see Table 111 below).

PROG_PAGELOAD

(0x6)

The AVR specific public JTAG instruction to directly load the Flash data page via the JTAG port.

The 1024 bit Virtual Flash Page Load Register is selected as register. This is a virtual scan chain

with length equal to the number of bits in one Flash page. Internally the Shift Register is 8-bit.

Unlike most JTAG instructions, the Update-DR state is not used to transfer data from the Shift

Shift-DR state by an internal state machine. This is the only active state:

•

Shift-DR: Flash page data are shifted in from TDI by the TCK input, and automatically

loaded into the Flash page one byte at a time.

Note:

The JTAG instruction PROG_PAGELOAD can only be used if the AVR device is the first device in

JTAG scan chain. If the AVR cannot be the first device in the scan chain, the byte-wise program-

ming algorithm must be used.

PROG_PAGEREAD

(0x7)

The AVR specific public JTAG instruction to read one full Flash data page via the JTAG port.

The 1032 bit Virtual Flash Page Read Register is selected as data register. This is a virtual scan

chain with length equal to the number of bits in one Flash page plus eight. Internally the Shift

data to the Shift Register. The data are automatically transferred from the Flash page buffer

byte-by-byte in the Shift-DR state by an internal state machine. This is the only active state:

•

Shift-DR: Flash data are automatically read one byte at a time and shifted out on TDO by the

TCK input. The TDI input is ignored.

Note:

The JTAG instruction PROG_PAGEREAD can only be used if the AVR device is the first device in

JTAG scan chain. If the AVR cannot be the first device in the scan chain, the byte-wise program-

ming algorithm must be used.

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