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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TPS658620ZQZT датащи(PDF) 87 Page - Texas Instruments |
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TPS658620ZQZT датащи(HTML) 87 Page - Texas Instruments |
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87 / 104 page  TPS658620 Advanced Power Management Unit www.ti.com SLVS993 – OCTOBER 2009 The power good signals from the integrated supplies are level sensitive, and they will continue to cause an interrupt until the power good condition returns or the signal is masked. For non-masked power good parameters the INT_ACK bit will indicate the present state of the power good signals. The INTMASK register bits are cleared to 0 upon power-up. Table 3-73. INT_ACK registers INT_ACK1 [Addr 0xB5] Bit Number B7 B6 B5 B4 B3 B2 B1 B0 Bit Name ACK_PLDO7 ACK_PLDO6 ACK_PLDO5 ACK_PLDO4 ACK_PLDO3 ACK_PLDO2 ACK_PLDO1 ACK_PLDO0 INT_ACK2 [Addr 0xB6] Bit Name ACK_PSM3 ACK_PSM2 ACK_PSM1 ACK_PSM0 ACK_PLDO9 ACK_PLDO8 ACK_ADC ACK_ COMPDET (1) INT_ACK3 [Addr 0xB7] Bit Name ACK_PP ACK_CHGTEMP ACK_CHGSTAT ACK_BATDET ACK_ACDET ACK_USBDET ACKACUSBOVP ACK_RTCALM1 INT_ACK4 [Addr 0xB8] Bit Name RSVDB87 RSVDB86 (2) IMASKLOWSYS IMASKRESUME IMASKRTCALM1 IMASKACDET ACK_LOWSYS ACK_RESUME (1) ACK_COMPDET= ACK INT BY HOTRST FLAG SET (2) RSVDB86= ACK INT BY SLEEP REQUEST Table 3-74. INTMASK Registers INTMASK1 [Addr 0xB0] Default to 1 (Masked) Bit Name IMASK_PLDO7 IMASK_PLDO6 IMASK_PLDO5 IMASK_PLDO4 IMASK_PLDO3 IMASK_PLDO2 IMASK_PLDO1 IMASK_PLDO0 INTMASK2 [Addr 0xB1] Default to 1 (Masked) Bit Name IMASK_PSM3 IMASK_PSM2 IMASK_PSM1 IMASK_PSM0 IMASK_PLDO9 IMASK_PLDO8 IMASKADC RSVDB10 INTMASK3 [Addr 0xB2] Default to 1 (Masked) Bit Name IMASKSYSSW IMASKACSW IMASKUSBSW IMASKBCHGSW RSVDB83 IMASK_HOT IMASK_COLD IMASKBATDET INTMASK4 [Addr 0xB3] Default to 1 (Masked) Bit Name IMASK_TMRFLT IMASK_DPPM IMASK_THON IMASK_TERM IMASK_TSHUT IMASKCHSTAT IMASKRTCALM2 IMASK_COMP INTMASK5 [Addr 0xB4] Default to 1 (Masked) Bit Name RSVDB47 IMASKLOWSYS IMASKRESUME IMASKRTCALM1 IMASKACDET IMAKSUSBDET IMAKSAC_OVP IMASKUSB_OVP The interrupt controller can monitor either level or edge transitions to generate the interrupt request: PARAMETER STATUS BIT SET INT_ACK BIT ON MASK reg/bit INT_ACK reg/bit ACK clear at LDO0 power good fault None PGOOD FAULT DETECTED INTMASK1 / INT_ACK1 / ACK_LDO0 Read INT_ACK1 IMASK_PLDO0 LDO1 power good fault None PGOOD FAULT DETECTED INTMASK1 / INT_ACK1 / ACK_PLDO1 Read INT_ACK1 IMASK_PLDO1 LDO2 power good fault None PGOOD FAULT DETECTED INTMASK1 / INT_ACK1 / ACK_PLDO2 Read INT_ACK1 IMASK_PLDO2 LDO3 power good fault None PGOOD FAULT DETECTED INTMASK1 / INT_ACK1 / ACK_PLDO3 Read INT_ACK1 IMASK_PLDO3 LDO4 power good fault None PGOOD FAULT DETECTED INTMASK1 / INT_ACK1 / ACK_PLDO4 Read INT_ACK1 IMASK_PLDO4 LDO5 power good fault None PGOOD FAULT DETECTED INTMASK1 / INT_ACK1 / ACK_PLDO5 Read INT_ACK1 IMASK_PLDO5 LDO6 power good fault None PGOOD FAULT DETECTED INTMASK1 / INT_ACK1 / ACK_PLDO6 Read INT_ACK1 IMASK_PLDO6 LDO7 power good fault None PGOOD FAULT DETECTED INTMASK1 / INT_ACK1 / ACK_PLDO7 Read INT_ACK1 IMASK_PLDO7 LDO8 power good fault None PGOOD FAULT DETECTED INTMASK2 / INT_ACK2 / ACK_PLDO8 Read INT_ACK2 IMASK_PLDO8 LDO9 power good fault None PGOOD FAULT DETECTED INTMASK2 / INT_ACK2 / ACK_PLDO9 Read INT_ACK2 IMASK_PLDO9 SM0 power good fault None PGOOD FAULT DETECTED INTMASK2 / IMASK_PSM0 INT_ACK2 / ACK_PSM0 Read INT_ACK2 SM1 power good fault None PGOOD FAULT DETECTED INTMASK2 / IMASK_PSM1 INT_ACK2 / ACK_PSM1 Read INT_ACK2 SM2 power good fault None PGOOD FAULT DETECTED INTMASK2 / IMASK_PSM2 INT_ACK2 / ACK_PSM2 Read INT_ACK2 SM3 over-voltage detection None SM3 OVER-VOLTAGE INTMASK2 / IMASK_PSM3 INT_ACK2 / ACK_PSM3 Read INT_ACK2 DETECTED HOT RESET FLAG STATUS STAT2 bit 0 HI →LO OR LO→HI INTMASK4 / IMASK_COMP INT_ACK2 / Read INT_ACK2 ACK_COMPDET Submit Documentation Feedback DETAILED DESCRIPTION 87 |
Аналогичный номер детали - TPS658620ZQZT |
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Аналогичное описание - TPS658620ZQZT |
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