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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TPS658620ZQZT датащи(PDF) 86 Page - Texas Instruments |
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TPS658620ZQZT датащи(HTML) 86 Page - Texas Instruments |
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86 / 104 page  3.64 STATUS REGISTERS 3.65 INTERRUPT CONTROLLER TPS658620 Advanced Power Management Unit SLVS993 – OCTOBER 2009 www.ti.com The system status is accessible via I2C registers listed below. The STATn registers are read only. Table 3-72. Status Registers ADC0_ INT [Addr 0x9A] Bit Number B7 B6 B5 B4 B3 B2 B1 B0 Bit Name ADC0_ DONE ADC0_ ERROR HILIM0_FLT LOLIM0_FLT RSVD9A3 RSVD9A2 ADC0_GPIO4ST ADC0_GPIO2ST Function CONVERSION ADC_STATUS HI LIMIT FAULT LO LIMIT FAULT NOT USED NOT USED GPIO4 LEVEL AT GPIO2 LEVEL AT CYCLE STATUS ADC0 EOC ADC0 EOC When 0 BUSY NO ERROR NOT DETECTED NOT DETECTED NOT USED NOT USED LOW LOW When 1 DONE ERROR DETECTED DETECTED NOT USED NOT USED HIGH HIGH STAT1 [Addr 0xB9] Bit Number B7 B6 B5 B4 B3 B2 B1 B0 Bit Name BATSYSON ACSWON USBSWON BATCHGSWON RSVDB83 PACK_HOT PACK_COLD BATDET Function BAT TO SYS AC SWITCH ON/OFF USB SWITCH BAT TO VIN_CHG SPARE PACK TEMP PACK TEMP BATTTERY PACK SWITCH ON/OFF STATUS ON/OFF STATUS SWITCH ON/OFF EXCEEDS HOT BELOW COLD TS THERMISTOR STATUS STATUS THRESHOLD THRESHOLD DETECTION When 0 OFF OFF OFF OFF NOT USED NO NO NOT DETECTED When 1 ON ON ON ON NOT USED YES YES DETECTED STAT2 [Addr 0xBA] Bit Number B7 B6 B5 B4 B3 B2 B1 B0 Bit Name TMRFLT DPPM_ON(4) TH_ON ITERM SLEEPTSHUT STAT1 STAT2 COMPDET Function PRE-CHARGE OR CHARGER DPPM CHARGER CHARGE NOT USED CHARGE STATUS nHOTRST PULSE CHARGE TIMER LOOP STATUS THERMAL LOOP CURRENT BELOW GENERATED TIMEOUT STATUS TERMINATION REBOOT CYCLE THRESHOLD When 0 NO OFF OFF NO NOT USED 00= PRE-CHARGE ON NO 01=CHARGE DONE When 1 YES ON ON YES NOT USED YES 10=FAST CHARGE ON 11= CHARGE SUSPEND, TIMER FAULT, CHARGER OFF STAT3 [Addr 0xBB] Bit Number B7 B6 B5 B4 B3 B2 B1 B0 Bit Name SLEEPREQ LOWSYS RESUME RTC_ALARM ACDET USBDET AC_OVP USB_OVP Function SLEEP REQUEST LOWSYS RESUME SPARE AC INPUT POWER USB INPUT AC INPUT OVP USB INPUT OVP STATE SET DETECTION DETECTION STATUS POWER STATUS DETECTION DETECTION STATUS STATUS When 0 NO NOT DETECTED NOT DETECTED SPARE NOT DETECTED NOT DETECTED NO OVP NO OVP When 1 YES DETECTED DETECTED SPARE DETECTED DETECTED OVP DETECTED OVP DETECTED STAT4 [Addr 0xBC] Bit Number B7 B6 B5 B4 B3 B2 B1 B0 Bit Name RSVDBC7 RSVDBC6 RSVDBC5 ADC0BUSY RSVDBC3 RSVDBC2 RSVDBC1 ADC0INT Function SPARE SPARE SPARE ADC ENGINE 0 SPARE SPARE SPARE ADC ENGINE 0 MODE INTERRUPT When 0 SPARE SPARE SPARE IDLE SPARE SPARE SPARE NOT ACTIVE When 1 SPARE SPARE SPARE BUSY SPARE SPARE SPARE ACTIVE The interrupt controller monitors the system status bus and internal signals continuously, generating an interrupt (INT = ‘0’) when a system status change is detected. Individual bits that generated the interrupt will be set to 1 in the INT_ACK registers (read only registers), indicating which parameters generated the interrupt. All the parameters monitored by the interrupt controller can be masked by registers INT_MASK (0=unmasked, 1=masked). Masked parameters do not generate an interrupt when their state changes. When the host reads the INT_ACK registers, the interrupt is reset causing the INT pin to go to a logic 1 and the INT_ACK register bits are cleared. DETAILED DESCRIPTION 86 Submit Documentation Feedback |
Аналогичный номер детали - TPS658620ZQZT |
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Аналогичное описание - TPS658620ZQZT |
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