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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TPS658620ZQZT датащи(PDF) 52 Page - Texas Instruments |
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TPS658620ZQZT датащи(HTML) 52 Page - Texas Instruments |
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52 / 104 page  3.49 INTEGRATED SUPPLY SEQUENCING – POWER-DOWN 3.50 HOST INTERFACE 3.51 EXTERNAL 32 kHz 3.52 SUPPLY INPUT PIN CONNECTION TPS658620 Advanced Power Management Unit SLVS993 – OCTOBER 2009 www.ti.com During sequencing, the following RAM bits control the supply ON/OFF mode: LDO2 RAM bits, LDO4 RAM bits, SM0 RAM bits and SM1 RAM bits. When the NORMAL mode is set, SM0EN controls the SM0 ON/OFF mode, SM1EN controls the SM1 ON/OFF mode and LDO4EN controls the LDO4 ON/OFF mode. To start a power down sequence the SLEEP REQUEST or REBOOT REQUEST states must be set. Once one of those two states is set the trigger pins are active again and they will control the ON/OFF state of the supplies associated with that trigger group. The device will enter the SLEEP or HARD REBOOT state 10ms after the SLEEP REQUEST or REBOOT REQUEST is initiated. Any supply still active when the SLEEP or HARD REBOOT state is entered will be immediately disabled. This is the default turn off condition for any supply associated with the INTERNAL sequencing trigger group. For example, if a supply has a default state of OFF and it has SM1EN as the selected factory trigger: this supply will not power up during the SUPPLYSEQ state when SM1EN goes high. If it is enabled during the NORMAL state and is still enabled when the SLEEP REQUEST or REBOOT REQUEST states are entered, this supply will be turned off on the falling edge of SM1EN as this is its assigned trigger group programmed at the factory. If LDO4EN is set LO by the host when the TPS658620 enters the SLEEP REQUEST or REBOOT REQUEST states, the LDO4 supply will turn off only when the HARD REBOOT or SLEEP states are set. The LDO4PG pin will be pulled low when LDO4EN is below VIL, with no delay. All the supplies are turned off at the same time when the TPS658620 enters the SLEEP or HARD REBOOT state. The TPS658620 devices have multiple signals that can be used by the external system to execute power sequencing operations or verify the system status. Those signals are generated as follows: 1. Power supply status (2V2 logic level) : SM0PG, SM1PG, LDO4PG – A HI level indicates that the supply is on and the regulation voltage is valid. A LO level indicates either that the supply voltage is out of regulation or that the supply has been disabled. 2. External system and host control (V32K pin logic level): The NOPOWER, NORTC, and OUT32K pins may be used to interface to external hosts, controlling the host reset and executing host-controlled power-up sequencing. The TPS658620 outputs a 32 kHz clock (pin OUT32K) that can be used by the external system. The OUT32K output starts when the NORTC pin is above VIH and V32K is valid. The 32 kHz can be derived either from an internal 32kHz oscillator or from a crystal-based clock, selectable via I2C using bit 6 of the RTC_CTRL (Addr 0xC0) register (see the Real Time Clock section). However, only the crystal-based clock is output to the OUT32K pin. The input pins for all supplies (VIN_LDO01, VIN_LDO23, VIN_LDO4, VIN_LDO678, VIN_LDO9) enable optimization of the overall system power architecture by connecting lower output voltage supplies to intermediate rails or external rails. Care must be taken to ensure that the input pin for each integrated supply is powered when the supply is enabled during the power-up sequencing. Failure to do so will result in a power good fault detection with a potential lock-up situation. The input pins VIN_SM0, VIN_SM1, VIN_SM2 must be connected to the SYS pin DETAILED DESCRIPTION 52 Submit Documentation Feedback |
Аналогичный номер детали - TPS658620ZQZT |
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Аналогичное описание - TPS658620ZQZT |
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