TPS658620ZQZT datasheet(30/104 Pages) TI

номер детали	TPS658620ZQZT

подробное описание детали	Advanced Power Management Unit

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3.8 I

2C READ AND WRITE OPERATIONS

3.9 VALID WRITE SEQUENCES (SDAT/SCLK, PSDAT/PSCLK)

TPS658620

Advanced Power Management Unit

SLVS993 – OCTOBER 2009

www.ti.com

The TPS658620 supports the standard I2C one byte Write. The basic I2C read protocol has the following

steps:

1. Host sends a start and sends TPS658620 address

2. TPS658620 ACK’s that this is a valid I2C address and that the bus is configured for write

3. Host sends TPS658620 register address

4. TPS658620 ACK’s that this is a valid register and stores the register address to be read

5. Host sends a repeated start and TPS658620 I2C slave address, reconfiguring the bus for read

6. TPS658620 ACK’s that this is a valid address and that bus is reconfigured

7. Bus is in read mode, TPS658620 starts sending data from selected register

The I2C write protocol is similar to the read, without the need for a repeated start and bus being set in

write mode. In a WRITE, it is not necessary to end each 1 byte WRITE command with a STOP as a

START will have the same effect (repeated start).

The host can complete a READ or a WRITE sequence with either a STOP or a START.

NOTE

Read operations are not supported for the PSDAT/PSCLK I

2C engine.

Figure 3-2. I2C Read/Write Example

30

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