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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AT89C5122D-RDRUM датащи(PDF) 141 Page - ATMEL Corporation |
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AT89C5122D-RDRUM датащи(HTML) 141 Page - ATMEL Corporation |
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141 / 208 page  141 AT83R5122, AT8xC5122/23 4202F–SCR–07/2008 Mode Fault flag, MODF: This bit becomes set to indicate that the level on the SS is inconsistent with the mode of the SPI. MODF with SSDIS reset, generates receiver/error CPU interrupt requests. Figure 88 gives a logical view of the above statements. Figure 88. SPI Interrupt Requests Generation Registers There are three registers in the module that provide control, status and data storage functions. These registers are described in the following paragraphs. Serial Peripheral Control Register (SPCON) The Serial Peripheral Control Register does the following: • Selects one of the Master clock rates • Configures the SPI module as Master or Slave • Selects serial clock polarity and phase • Enables the SPI module • Frees the SS pin for a general-purpose SSDIS MODF CPU Interrupt Request SPI Receiver/error CPU Interrupt Request SPI Transmitter SPI CPU Interrupt Request SPIF |
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