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M38045FFHKP датащи(PDF) 289 Page - Renesas Technology Corp |
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M38045FFHKP датащи(HTML) 289 Page - Renesas Technology Corp |
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289 / 387 page ![]() 2-165 APPLICATION 2.13 Flash memory mode Rev.1.00 Jan 14, 2005 REJ09B0212-0100Z 3804 Group (Spec.H) (2) Control pin termination example in CPU rewrite mode In this example, data is received by using serial I/O, and the data is programmed to the built-in flash memory in the CPU rewrite mode. Figure 2.13.10 shows an example of the reprogramming system for the built-in flash memory in the CPU rewrite mode. For the CPU rewrite mode beginning/release method, refer to “2.13.6 CPU rewrite mode.” Fig. 2.13.10 Example of rewrite system for built-in flash memory in CPU rewrite mode (single-chip mode) VCC AVSS VSS RESET M 38049FFHSP/FP/HP/KP CNVSS SRDY1(BUSY) RXD TXD SCLK1 Clock input BUSY output Data input Data output User reset signal XIN XOUT |
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