M38048F2HKP datasheet(164/387 Pages) RENESAS

164 / 387 page

2-40

APPLICATION

2.3 Timer

Rev.1.00 Jan 14, 2005

REJ09B0212-0100Z

3804 Group (Spec.H)

Fig. 2.3.24 Control procedure

(address 002316)

(address 000E16)

(address 002016)

(address 002116)

(address 002616)

(address 002716)

(address 003C16)

(address 003E16), bit6

RESET

SEI

T12XCSS

PRE12

PREY

IREQ1

ICON1

CLI

IREQ1(address 003C16), bit5 ?

RTI

TY (address 002716)

(A)

214 < (A) < 228

Fpulse

(address 002716)

IREQ1 (address 003C16), bit5

256 – 1

(address 002316), bit7

q x: This bit is not used here. Set it to “0” or “1” arbitrary.

•All interrupts disabled

•Timer Y operating mode : Event counter mode

(Count a falling edge of pulses input from CNTR1 pin.)

•Set division ratio so that Timer 1 interrupt will occur at

2 ms intervals.

•Timer Y count start

•Interrupts enabled

Note 1: When using Index X mode flag (T)

Note 2: When using Decimal mode flag (D)

•Push registers used in interrupt process routine

•Pop registers pushed to stack

•Initialize the counter value

•Clear Timer Y interrupt request bit

Initialization

1110XXXX2

XXXX01002

64 – 1

8 – 1

1 – 1

255

X00XXXXX2

Timer 1 interrupt process routine

CLT (Note 1)

CLD (Note 2)

Push registers to stack

•Process as out of range when the count value is 256 or more

•Read the count value

•Store the count value into Accumulator (A)

In range

Out of range

•Compare the read value with

reference value

•Store the comparison result to

flag Fpulse

Process judgment result

Pop registers

•Timer 1, Y interrupt request bit cleared

•Timer 1 interrupt: Enabled

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