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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M38040F2HKP датащи(PDF) 197 Page - Renesas Technology Corp |
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M38040F2HKP датащи(HTML) 197 Page - Renesas Technology Corp |
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197 / 387 page  2-73 APPLICATION 2.4 Serial interface Rev.1.00 Jan 14, 2005 REJ09B0212-0100Z 3804 Group (Spec.H) Control procedure : q Control in the master unit After setting the relevant registers shown in Figure 2.4.35, the master unit starts transmission or reception of 1-byte data by writing transmission data to the transmit buffer register. To perform the communication in the timing shown in Figure 2.4.34, take the timing into account and write transmission data. Additionally, read out the reception data when the serial I/O1 transmit interrupt request bit is set to “1,” or before the next transmission data is written to the transmit buffer register. Figure 2.4.36 shows a control procedure of the master unit using timer interrupts. Fig. 2.4.36 Control procedure of master unit Interrupt processing routine executed every 488 µs Write a transmission data Read a reception data N Within a block transfer period? Y Y Complete to transfer a block? N RTI Write the first transmission data (first byte) in a block Count a block interval counter N Start a block transfer? Y Generate a certain block interval by using a timer or other functions. Check the block interval counter and determine to start a block transfer. q q CLT (Note 1) CLD (Note 2) Push register to stack Note 1: When using the Index X mode flag (T). Note 2: When using the Decimal mode flag (D). Push the register used in the interrupt processing routine into the stack. q Pop registers Pop registers which is pushed to stack. q |
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