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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M32C/86 датащи(PDF) 310 Page - Renesas Technology Corp |
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M32C/86 датащи(HTML) 310 Page - Renesas Technology Corp |
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310 / 505 page  Page 287 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 22. Intelligent I/O (Waveform Generating Function) ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M Table 22.11 SR Waveform Output Mode Specifications (Continued) Item Specification Waveform Output Start Condition(5) The IFEq bit (q=0 to 7) in the G1FE register is set to "1" (channel q function enabled) Waveform Output Stop Condition The IFEq bit is set to "0" (channel q function disabled) Interrupt Request The PO1jR bit in the interrupt request register is set to "1" (interrupt requested) when the value of the base timer matches that of the G1POj register. The PO1kR bit in the interrupt request register is set to "1" (imterrupt requested) when the value of the base timer matches that of the G1POk register. (See Figure 11.14) OUTC1j Pin Pulse signal output pin Selectable Function • Default value set function: Set starting waveform output level • Inversed output function Waveform output level is inversed to provide a waveform from the OUTC1j pin NOTES: 5. Set the FSCj bit in the G1FS register to "0" (waveform generating function selected). |
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