M32CSLASH86 datasheet(183/505 Pages) RENESAS

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Page 160

15. Timer (Timer A)

)

(

15.1.4 Pulse Width Modulation Mode

In pulse width modulation mode, the timer outputs pulse of desired width continuously (see Table 15.7).

The timer counter functions as either 16-bit pulse width modulator or 8-bit pulse width modulator. Figure

15.13 shows the TAiMR register (i=0 to 4) in pulse width modulation mode. Figures 15.14 and 15.15

show examples of how a 16-bit pulse width modulator operates and of how an 8-bit pulse width modulator

operates.

Table 15.7 Pulse Width Modulation Mode Specifications

Item

Specification

Count Source

f1, f8, f2n(1), fC32

Counting Operation

• The timer decrements a counter value

(The counter functions as an 8-bit or a 16-bit pulse width modulator)

Content of the reload register is reloaded on the rising edge of PWM pulse and count-

ing continues.

The timer is not affected by a trigger that is generated during counting.

16-Bit PWM

• "H" width =

n / fj

n : setting value of the TAi register

000016 to FFFE16

fj : count source frequency

• Cycle =

(216-1) / fj fixed

8-Bit PWM

• "H" width

= n x (m+1) / fj

• Cycles =

(28-1) x (m+1) / fj

m : setting value of low-order bit address of the TAi register

0016 to FF16

n : setting value of high-order bit address of the TAi register

0016 to FE16

Counter Start Condition

• External trigger input is provided

• Timer counter overflows or underflows

• The TAiS bit in the TABSR register is set to "1" (starts counting)

Counter Stop Condition

The TAiS bit is set to "0" (stops counting)

Interrupt Request Generation Timing On the falling edge of the PWM pulse

TAiIN Pin Function

Programmable I/O port or trigger input

TAiOUT Pin Function

Pulse output

Read from Timer

The value in the TAi register is indeterminate when read

Write to Timer

• When the timer counter stops, the value written to the TAi register is also written to

both reload register and counter

• While counting, the value written to the TAi register is written to the reload register

(It is transferred to the counter at the next reload timing)

NOTES:

1. The CNT3 to CNT0 bits in the TCSPR register select no division (n=0) or divide-by-2n (n=1 to 15).

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