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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HD64F2149YV датащи(PDF) 415 Page - Renesas Technology Corp |
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HD64F2149YV датащи(HTML) 415 Page - Renesas Technology Corp |
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415 / 1075 page  Section 13 Timer Connection Rev. 3.00 Jan 18, 2006 page 387 of 1044 REJ09B0280-0300 13.2.2 Timer Connection Register O (TCONRO) Bit Initial value Read/Write 7 HOE 0 R/W 6 VOE 0 R/W 5 CLOE 0 R/W 4 CBOE 0 R/W 3 HOINV 0 R/W 0 CBOINV 0 R/W 2 VOINV 0 R/W 1 CLOINV 0 R/W TCONRO is an 8-bit readable/writable register that controls output signal output, phase inversion, etc. TCONRO is initialized to H'00 by a reset and in hardware standby mode. Bits 7 and 4—Output Enable (HOE, VOE, CLOE, CBOE): These bits control enabling/disabling of horizontal synchronization signal (HSYNCO), vertical synchronization signal (VSYNCO), clamp waveform (CLAMPO), and blanking waveform (CBLANK) output. When output is disabled, the state of the relevant pin is determined by the port DR and DDR, FRT, TMR, and PWM settings. Output enabling/disabling control does not affect the port, FRT, or TMR input functions, but some FRT and TMR input signal sources are determined by the SCONE bit in TCONRI. Bit 7 HOE Description 0 The P44/TMO1/HIRQ1/HSYNCO pin functions as the P44/TMO1/HIRQ1 pin (Initial value) 1 The P44/TMO1/HIRQ1/HSYNCO pin functions as the HSYNCO pin Bit 6 VOE Description 0 The P61/FTOA/ KIN1/CIN1/VSYNCO pin functions as the P61/FTOA/ KIN1/CIN1 pin (Initial value) 1 The P61/FTOA/ KIN1/CIN1/VSYNCO pin functions as the VSYNCO pin |
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