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M32C/8B датащи(PDF) 207 Page - Renesas Technology Corp |
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M32C/8B датащи(HTML) 207 Page - Renesas Technology Corp |
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207 / 406 page ![]() Under development M32C/8B Group 16. Three-Phase Motor Control Timer Function Preliminary specification Specifications in this manual are tentative and subject to change. REJ09B0450-0050 Rev.0.50 Oct 31, 2008 Page 190 of 385 Figure 16.11 shows an example of the triangular wave modulation operation (three-phase mode 0). Figures 16.12 and 16.13 show examples of the triangular wave modulation operation (three-phase mode 1). Figure 16.11 Triangular Wave Modulation Operation (Three-Phase Mode 0) Dead time DUB0 = 0 Triangular Waveform as a Carrier Wave (Three-phase mode 0) Carrier wave TB2S bit in the TABSR register Signal wave Timer B2 NOTE: 1. Internal signals. See Three-Phase Motor Control Timer Function Block Diagram. The above applies under the following conditions: - INVC0 register: INV01 bit = 0 (ICTB2 counter is incremented by 1 when timer B2 underflows) INV02 bit = 1 (Three-phase motor control timer function used) INV03 bit = 1 (Three-phase motor control timer output enabled) INV06 bit = 0 (Triangular wave modulation mode) - INVC1 register: INV10 bit = 0 (Timer B2 underflow) INV11 bit = 0 (Timers A11, A21, A41 not used (Three-phase mode 0)) INV15 bit = 0 (Dead time enabled) INV16 bit = 1 (Rising edge of the three-phase output shift register (U-, V-, W-phase)) - ICTB2 register = 01h (Timer B2 interrupt is generated every timer B2 underflow) Timer A4 start trigger signal(1) TA4 register Reload register(1) Timer A4 one-shot pulse(1) INV14 bit in INVC1 register = 0 (Active Low) Dead time Values are transferred to the three-phase output shift register from registers IDB0 and IDB1 Rewrite registers IDB0 and IDB1 Upper arm (U-phase) output signal(1) Lower arm (U-phase) output signal(1) U-phase U-phase INV14 bit in INVC1 register = 1 (Active High) U-phase U-phase IR bit in the TB2IC register a 1 a 2 The following shows examples to change PWM output levels. - Default value of the timer: TA4 = a 1 (The TA4 register is rewritten every time the timer B2 interrupt occurs.) First time TA4 = a 2, second time TA4 = a3, third time TA4 = a4, fourth time TA4 = a5, fifth time TA4 = a6 - Default value of the registers IDB0 and IDB1: DU0 = 1, DUB0 = 0, DU1 = 0, and DUB1 = 1 They are changed to DU0 = 1, DUB0 = 0, DU1 = 1, and DUB1 = 0 at the sixth timer B2 interrupt. a 3 a 4 a 5 a 7 a 8 DU0 = 1 DU1 = 0 DUB1 = 1 DUB1 = 0 DUB0 = 0 DU0 = 1 DU1 = 1 Set to 0 by an interrupt request acknowledgement or by a program a 2 a 1 a 3 a 4 a 5 a 6 a 7 a 8 a 9 a 2 a 1 a 3 a 4 a 5 a 6 a 7 a 8 a 9 a 6 |
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