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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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R8C2K датащи(PDF) 287 Page - Renesas Technology Corp |
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R8C2K датащи(HTML) 287 Page - Renesas Technology Corp |
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287 / 471 page  R8C/2K Group, R8C/2L Group 16. Timers Rev.1.10 Dec 21, 2007 Page 270 of 450 REJ09B0406-0110 Figure 16.111 Operating Example of PWM Mode (Duty 0%, Duty 100%) m p q Value in TRDi register n m: Value set in TRDGRAi register Set to 0 by a program Rewrite by a program 0000h q Duty 0% TRDGRBi register IMFA bit in TRDSRi register 1 0 IMFB bit in TRDSRi register 1 0 TSTARTi bit in TRDSTR register TRDIOBi output p (p>m) n Since no compare match in the TRDGRBi register is generated, “L” is not applied to the TRDIOBi output 1 0 m p Value in TRDi register n 0000h TRDGRBi register IMFA bit in TRDSRi register 1 0 IMFB bit in TRDSRi register 1 0 TSTARTi bit in TRDSTR register TRDIOBi output p n 1 0 “L” is applied to TRDIOBi output at compare match with the TRDGRBi register with no change. m i = 0 or 1 The above applies under the following conditions: The EBi bit in the TRDOER1 register is set to 0 (enable TRDIOBi output). The POLB bit in the TRDPOCRi register is set to 0 (active level “L”). Rewrite by a program Set to 0 by a program Set to 0 by a program When compare matches with registers TRDGRAi and TRDGRBi are generated simultaneously, the compare match with the TRDGRBi register has priority. “L” is applied to the TRDIOBi output without any change. Duty 100% Set to 0 by a program |
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